| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | manual: document some gates. | whitequark | 2019-01-14 | 1 | -9/+11 |
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| * | manual: explain $tribuf cell. | whitequark | 2019-01-14 | 1 | -0/+10 |
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| * | Fix typo in manual | Clifford Wolf | 2019-01-07 | 1 | -1/+1 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | manual: make description of $meminit ports match reality. | whitequark | 2018-12-21 | 1 | -3/+15 |
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| * | manual: fix typos. | whitequark | 2018-12-20 | 1 | -2/+2 |
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| * | manual: document $meminit cell and memory_* passes. | whitequark | 2018-12-20 | 1 | -6/+21 |
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| * | Add $allconst and $allseq cell types | Clifford Wolf | 2018-02-23 | 1 | -1/+2 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Add $_ANDNOT_ and $_ORNOT_ gates | Clifford Wolf | 2017-05-17 | 1 | -1/+2 |
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| * | Add $live and $fair cell types, add support for s_eventually keyword | Clifford Wolf | 2017-02-25 | 1 | -1/+1 |
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| * | Add $cover cell type and SVA cover() support | Clifford Wolf | 2017-02-04 | 1 | -1/+1 |
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| * | Added $anyseq cell type | Clifford Wolf | 2016-10-14 | 1 | -1/+1 |
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| * | Added $ff and $_FF_ cell types | Clifford Wolf | 2016-10-12 | 1 | -0/+4 |
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| * | Removed $aconst cell type | Clifford Wolf | 2016-08-30 | 1 | -1/+1 |
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| * | Removed $predict again | Clifford Wolf | 2016-08-28 | 1 | -1/+1 |
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| * | Added $anyconst and $aconst | Clifford Wolf | 2016-07-27 | 1 | -1/+1 |
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| * | Added $initstate cell type and vlog function | Clifford Wolf | 2016-07-21 | 1 | -1/+1 |
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| * | After reading the SV spec, using non-standard predict() instead of expect() | Clifford Wolf | 2016-07-21 | 1 | -1/+1 |
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| * | Added basic support for $expect cells | Clifford Wolf | 2016-07-13 | 1 | -1/+1 |
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| * | Added $sop cell type and "abc -sop" | Clifford Wolf | 2016-06-17 | 1 | -0/+4 |
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| * | Added read-enable to memory model | Clifford Wolf | 2015-09-25 | 1 | -2/+6 |
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| * | Spell check (by Larry Doolittle) | Clifford Wolf | 2015-08-14 | 1 | -2/+2 |
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| * | Added $assume cell type | Clifford Wolf | 2015-02-26 | 1 | -1/+1 |
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| * | Added $equiv cell type | Clifford Wolf | 2015-01-19 | 1 | -1/+1 |
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| * | Added more documentation fixmes for nontrivial register cells | Clifford Wolf | 2014-12-08 | 1 | -1/+9 |
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| * | Added $lcu cell type | Clifford Wolf | 2014-09-08 | 1 | -1/+1 |
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| * | Removed $bu0 cell type | Clifford Wolf | 2014-09-04 | 1 | -6/+0 |
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| * | Added $alu cell type | Clifford Wolf | 2014-08-30 | 1 | -0/+4 |
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| * | Added additional gate types: $_NAND_ $_NOR_ $_XNOR_ $_AOI3_ $_OAI3_ $_AOI4_ ↵ | Clifford Wolf | 2014-08-16 | 1 | -0/+4 |
| | | | | | $_OAI4_ | ||||
| * | Renamed $_INV_ cell type to $_NOT_ | Clifford Wolf | 2014-08-15 | 1 | -2/+2 |
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| * | Removed old doc references to $safe_pmux | Clifford Wolf | 2014-08-15 | 1 | -4/+0 |
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| * | Changed the $mem/$memwr WR_EN input to a per-data-bit enable signal | Clifford Wolf | 2014-07-16 | 1 | -3/+4 |
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| * | Added $slice and $concat cell types | Clifford Wolf | 2014-02-07 | 1 | -0/+4 |
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| * | Added TRANSPARENT parameter to $memrd (and RD_TRANSPARENT to $mem) | Clifford Wolf | 2014-02-03 | 1 | -0/+7 |
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| * | Added $assert cell | Clifford Wolf | 2014-01-19 | 1 | -0/+4 |
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| * | Added correct handling of $memwr priority | Clifford Wolf | 2014-01-03 | 1 | -0/+3 |
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| * | Added new cell types to manual | Clifford Wolf | 2013-12-28 | 1 | -0/+9 |
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| * | Moved common techlib files to techlibs/common | Clifford Wolf | 2013-09-15 | 1 | -2/+2 |
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| * | Added Yosys Manual | Clifford Wolf | 2013-07-20 | 1 | -0/+408 |
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index : iCE40/yosys | |
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