iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Merge pull request #513 from udif/pr_reg_wire_error	Clifford Wolf	2018-08-15	2	-0/+75
\|\
\| *	Modified errors into warnings	Udi Finkelstein	2018-06-05	1	-4/+38
\| *	reg_wire_error test needs the -sv flag so it is run via a script so it had to...	Udi Finkelstein	2018-06-05	2	-0/+1
\| *	This PR should be the base for discussion, do not merge it yet!	Udi Finkelstein	2018-03-11	1	-0/+40
* \|	Fixed typo (sikp -> skip)	Udi Finkelstein	2018-06-05	1	-1/+1
* \|	autotest.sh: Change from /bin/bash to /usr/bin/env bash	Johnny Sorocil	2018-05-06	1	-1/+1
* \|	Fix tests/simple/specify.v	Clifford Wolf	2018-03-27	1	-2/+2
* \|	First draft of Verilog parser support for specify blocks and parameters.	Udi Finkelstein	2018-03-27	1	-0/+31
\|/
*	Major redesign of Verific SVA importer	Clifford Wolf	2018-02-27	1	-1/+1
*	Add support for SVA throughout via Verific	Clifford Wolf	2018-02-21	1	-1/+1
*	Add support for SVA sequence concatenation ranges via verific	Clifford Wolf	2018-02-18	2	-0/+20
*	Add support for SVA until statements via Verific	Clifford Wolf	2018-02-18	1	-0/+19
*	Fix verific PRIM_SVA_AT handling in properties with PRIM_SVA_DISABLE_IFF	Clifford Wolf	2018-02-15	1	-0/+34
*	Remove PSL example from tests/sva/	Clifford Wolf	2017-10-20	2	-35/+1
*	Allow $size and $bits in verilog mode, actually check test case	Clifford Wolf	2017-09-29	2	-0/+2
*	$size() now works correctly for all cases!	Udi Finkelstein	2017-09-26	1	-5/+11
*	$size() seems to work now with or without the optional parameter.	Udi Finkelstein	2017-09-26	1	-8/+18
*	Added $bits() for memories as well.	Udi Finkelstein	2017-09-26	1	-6/+5
*	$size() now works with memories as well!	Udi Finkelstein	2017-09-26	1	-2/+4
*	Add $size() function. At the moment it works only on expressions, not on memo...	Udi Finkelstein	2017-09-26	1	-0/+15
*	Add simple VHDL+PSL example	Clifford Wolf	2017-07-28	4	-17/+64
*	Improve Verific SVA importer	Clifford Wolf	2017-07-27	1	-7/+8
*	Add counter.sv SVA test	Clifford Wolf	2017-07-27	1	-0/+29
*	Improve SVA tests, add Makefile and scripts	Clifford Wolf	2017-07-27	11	-9/+110
*	Add more SVA test cases for future Verific work	Clifford Wolf	2017-07-22	5	-1/+74
*	Add some simple SVA test cases for future Verific work	Clifford Wolf	2017-07-22	4	-0/+45
*	Squelch trailing whitespace	Larry Doolittle	2017-04-12	1	-1/+1
*	Fixed typo in tests/simple/arraycells.v	Clifford Wolf	2017-01-04	1	-1/+1
*	Build hotfix in tests/unit/Makefile	Clifford Wolf	2016-12-11	1	-1/+1
*	Improved unit test structure	rodrigosiqueira	2016-12-10	1	-11/+18
*	Added required structure to implement unit tests	rodrigosiqueira	2016-12-04	3	-0/+56
*	Added support for hierarchical defparams	Clifford Wolf	2016-11-15	1	-0/+23
*	Added support for (single-clock) transparent memories to bram tests	Clifford Wolf	2016-11-01	2	-10/+23
*	Fixed "make test" for git head of iverilog	Clifford Wolf	2016-10-11	1	-1/+1
*	Merge branch 'master' of https://github.com/brouhaha/yosys	Clifford Wolf	2016-09-23	13	-16/+161
\|\
\| *	Add optional SEED=n command line option to Makefile, and -S n command line op...	Eric Smith	2016-09-22	13	-16/+161
* \|	Added autotest.sh -I	Clifford Wolf	2016-09-20	1	-16/+19
\|/
*	Fix for modules with big interfaces.	Kaj Tuomi	2016-09-13	1	-2/+2
*	Fixed bug with memories that do not have a down-to-zero data width	Clifford Wolf	2016-08-22	1	-0/+30
*	Added another mem2reg test case	Clifford Wolf	2016-08-21	1	-0/+11
*	Another bugfix in mem2reg code	Clifford Wolf	2016-08-21	1	-0/+22
*	Added "test_autotb -seed" (and "autotest.sh -S")	Clifford Wolf	2016-08-06	1	-2/+4
*	Fixed mem assignment in left-hand-side concatenation	Clifford Wolf	2016-07-08	1	-0/+13
*	Fixed autotest.sh handling of `timescale	Clifford Wolf	2016-07-02	1	-14/+10
*	Fixed init issue in mem2reg_test2 test case	Clifford Wolf	2016-06-17	1	-2/+6
*	Added opt_expr support for div/mod by power-of-two	Clifford Wolf	2016-05-29	1	-0/+27
*	Some fixes in tests/asicworld/*_tb.v	Clifford Wolf	2016-05-20	4	-50/+41
*	Improvements and fixes in autotest.sh script and test_autotb	Clifford Wolf	2016-05-20	1	-6/+6
*	Fix for Modelsim transcript line warp issue #164	Kaj Tuomi	2016-05-19	1	-4/+4
*	Bugfix and improvements in memory_share	Clifford Wolf	2016-04-21	1	-0/+21