diff options
| author | Kaj Tuomi <kaj.tuomi@siru.fi> | 2016-05-19 11:34:38 +0300 |
|---|---|---|
| committer | Kaj Tuomi <kaj.tuomi@siru.fi> | 2016-05-19 11:34:38 +0300 |
| commit | f6221ade950411ed10e6f260971cff78b30b8666 (patch) | |
| tree | fdcc135d308ad7724052e483a4c00182b7921fe1 /tests | |
| parent | ffcdc53a18197e40571b9c604fff07408cc12346 (diff) | |
| download | yosys-f6221ade950411ed10e6f260971cff78b30b8666.tar.gz yosys-f6221ade950411ed10e6f260971cff78b30b8666.tar.bz2 yosys-f6221ade950411ed10e6f260971cff78b30b8666.zip | |
Fix for Modelsim transcript line warp issue #164
Diffstat (limited to 'tests')
| -rwxr-xr-x | tests/tools/autotest.sh | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/tests/tools/autotest.sh b/tests/tools/autotest.sh index 840cb19ff..feaadb1a1 100755 --- a/tests/tools/autotest.sh +++ b/tests/tools/autotest.sh @@ -65,8 +65,8 @@ compile_and_run() { if $use_modelsim; then altver=$( ls -v /opt/altera/ | grep '^[0-9]' | tail -n1; ) /opt/altera/$altver/modelsim_ase/bin/vlib work - /opt/altera/$altver/modelsim_ase/bin/vlog "$@" - /opt/altera/$altver/modelsim_ase/bin/vsim -c -do 'run -all; exit;' testbench | grep '#OUT#' > "$output" + /opt/altera/$altver/modelsim_ase/bin/vlog +define+dmp_name=\"$output\" "$@" + /opt/altera/$altver/modelsim_ase/bin/vsim -c -do 'run -all; exit;' testbench elif $use_xsim; then ( set +x @@ -76,8 +76,8 @@ compile_and_run() { /opt/Xilinx/Vivado/$xilver/bin/xelab -R work.testbench | grep '#OUT#' > "$output" ) else - iverilog -s testbench -o "$exe" "$@" - vvp -n "$exe" > "$output" + iverilog -Ddmp_name=\"$output\" -s testbench -o "$exe" "$@" + vvp -n "$exe" fi } |