Commit message (Collapse) | Author | Age | Files | Lines | |
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* | verilog: fix $past's signedness | Jannis Harder | 2022-05-25 | 1 | -0/+35 |
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* | verilog: fix signedness when removing unreachable cases | Jannis Harder | 2022-05-24 | 1 | -0/+33 |
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* | Add memory_bmux2rom pass. | Marcelina Kościelnicka | 2022-05-18 | 1 | -0/+27 |
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* | Add memory_libmap tests. | Marcelina Kościelnicka | 2022-05-18 | 21 | -0/+1499 |
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* | efinix: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 1 | -12/+1 |
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* | ice40: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 1 | -56/+0 |
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* | xilinx: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 3 | -46/+15 |
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* | nexus: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 1 | -2/+2 |
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* | ecp5: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 1 | -135/+18 |
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* | proc_rom: Add special handling of const-0 address bits. | Marcelina Kościelnicka | 2022-05-18 | 1 | -0/+146 |
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* | Merge pull request #3314 from jix/sva_value_change_logic_wide | Jannis Harder | 2022-05-16 | 2 | -2/+43 |
|\ | | | | | verific: Use new value change logic also for $stable of wide signals. | ||||
| * | verific: Use new value change logic also for $stable of wide signals. | Jannis Harder | 2022-05-11 | 2 | -2/+43 |
| | | | | | | | | I missed this in the previous PR. | ||||
* | | Add proc_rom pass. | Marcelina Kościelnicka | 2022-05-13 | 1 | -0/+43 |
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* | Merge pull request #3305 from jix/sva_value_change_logic | Jannis Harder | 2022-05-09 | 7 | -1/+96 |
|\ | | | | | verific: Improve logic generated for SVA value change expressions | ||||
| * | verific: Improve logic generated for SVA value change expressions | Jannis Harder | 2022-05-09 | 7 | -1/+96 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previously generated logic assumed an unconstrained past value in the initial state and did not handle 'x values. While the current formal verification flow uses 2-valued logic, SVA value change expressions require a past value of 'x during the initial state to behave in the expected way (i.e. to consider both an initial 0 and an initial 1 as $changed and an initial 1 as $rose and an initial 0 as $fell). This patch now generates logic that at the same time a) provides the expected behavior in a 2-valued logic setting, not depending on any dont-care optimizations, and b) properly handles 'x values in yosys simulation | ||||
* | | Merge pull request #3297 from jix/sva_nested_clk_else | Jannis Harder | 2022-05-09 | 1 | -0/+11 |
|\ \ | |/ |/| | verific: Fix conditions of SVAs with explicit clocks within procedures | ||||
| * | verific: Fix conditions of SVAs with explicit clocks within procedures | Jannis Harder | 2022-05-03 | 1 | -0/+11 |
| | | | | | | | | | | | | | | | | | | For SVAs that have an explicit clock and are contained in a procedure which conditionally executes the assertion, verific expresses this using a mux with one input connected to constant 1 and the other output connected to an SVA_AT. The existing code only handled the case where the first input is connected to 1. This patch also handles the other case. | ||||
* | | Fix running sva tests | Miodrag Milanovic | 2022-05-09 | 1 | -4/+3 |
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* | | opt_mem: Remove constant-value bit lanes. | Marcelina Kościelnicka | 2022-05-07 | 2 | -15/+2 |
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* | sv: fix always_comb auto nosync for nested and function blocks | Zachary Snow | 2022-04-05 | 2 | -0/+30 |
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* | opt_merge: Add `-keepdc` option required for formal verification | Jannis Harder | 2022-04-01 | 1 | -0/+50 |
| | | | | | | | | The `-keepdc` option prevents merging flipflops with dont-care bits in their initial value, as, in general, this is not a valid transform for formal verification. The keepdc option of `opt` is passed along to `opt_merge` now. | ||||
* | Fix valgrind tests when using verific | Miodrag Milanovic | 2022-03-30 | 4 | -8/+8 |
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* | Proper example code | Miodrag Milanovic | 2022-03-14 | 2 | -1/+3 |
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* | intel_alm: M10K write-enable is negative-true | Lofty | 2022-03-09 | 1 | -1/+2 |
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* | Merge pull request #3207 from nakengelhardt/json_escape_quotes | Miodrag Milanović | 2022-03-04 | 2 | -0/+15 |
|\ | | | | | fix handling of escaped chars in json backend and frontend (mostly) | ||||
| * | fix handling of escaped chars in json backend and frontend | N. Engelhardt | 2022-02-18 | 2 | -0/+15 |
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* | | test dlatchsr and adlatch | Miodrag Milanovic | 2022-02-16 | 4 | -4/+94 |
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* | | Added test cases | Miodrag Milanovic | 2022-02-16 | 38 | -0/+896 |
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* | verilog: support for time scale delay values | Zachary Snow | 2022-02-14 | 1 | -0/+25 |
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* | Fix access to whole sub-structs (#3086) | Kamil Rakoczy | 2022-02-14 | 4 | -5/+51 |
| | | | | | | * Add support for accessing whole struct * Update tests Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com> | ||||
* | verilog: fix dynamic dynamic range asgn elab | Zachary Snow | 2022-02-11 | 2 | -0/+108 |
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* | verilog: fix const func eval with upto variables | Zachary Snow | 2022-02-11 | 2 | -0/+84 |
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* | gowin: Fix LUT RAM inference, add more models. | Marcelina Kościelnicka | 2022-02-09 | 1 | -3/+2 |
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* | Merge pull request #3185 from YosysHQ/micko/co_sim | Miodrag Milanović | 2022-02-07 | 7 | -0/+953 |
|\ | | | | | Add co-simulation in sim pass | ||||
| * | bug fix and cleanups | Miodrag Milanovic | 2022-02-04 | 1 | -2/+2 |
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| * | Add test cases for co-simulation | Miodrag Milanovic | 2022-02-02 | 7 | -0/+953 |
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* | | opt_reduce: Add $bmux and $demux optimization patterns. | Marcelina Kościelnicka | 2022-01-30 | 2 | -0/+208 |
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* | Merge pull request #3120 from Icenowy/anlogic-bram | Miodrag Milanović | 2022-01-19 | 2 | -1/+14 |
|\ | | | | | anlogic: support BRAM mapping | ||||
| * | anlogic: support BRAM mapping | Icenowy Zheng | 2021-12-17 | 2 | -1/+14 |
| | | | | | | | | | | | | | | | | | | | | | | Anlogic FPGAs all have two kinds of BRAMs, one is 9bit*1K when being true dual port (or 18bit*512 when simple dual port), the other is 16bit*2K. Supports mapping of these two kinds of BRAMs. 9Kbit BRAM in SDP mode and 32Kbit BRAM with 8bit width are not support yet. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> | ||||
* | | sv: auto add nosync to certain always_comb local vars | Zachary Snow | 2022-01-07 | 8 | -0/+135 |
| | | | | | | | | | | If a local variable is always assigned before it is used, then adding nosync prevents latches from being needlessly generated. | ||||
* | | sv: fix size cast internal expression extension | Zachary Snow | 2022-01-07 | 2 | -0/+145 |
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* | | logger: fix unmatched expected warnings and errors | Zachary Snow | 2022-01-04 | 1 | -0/+42 |
| | | | | | | | | | | | | | | | | - Prevent unmatched expected error patterns from self-matching - Prevent infinite recursion on unmatched expected warnings - Always print the error message for unmatched error patterns - Add test coverage for all unmatched message types - Add test coverage for excess matched logs and warnings | ||||
* | | fix iverilog compatibility for new case expr tests | Zachary Snow | 2022-01-03 | 2 | -2/+2 |
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* | | fixup verilog doubleslash test | Zachary Snow | 2022-01-03 | 2 | -0/+3 |
| | | | | | | | | | | - add generated doubleslash.v to .gitignore - ensure backend verilog can be read again | ||||
* | | sv: fix size cast clipping expression width | Zachary Snow | 2022-01-03 | 1 | -0/+7 |
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* | | memory_share: Fix SAT-based sharing for wide ports. | Marcelina Kościelnicka | 2021-12-20 | 1 | -0/+34 |
| | | | | | | | | Fixes #3117. | ||||
* | | fix width detection of array querying function in case and case item expressions | Zachary Snow | 2021-12-17 | 2 | -0/+43 |
|/ | | | | | I also removed the unnecessary shadowing of `width_hint` and `sign_hint` in the corresponding case in `simplify()`. | ||||
* | preprocessor: do not destroy double slash escaped identifiers | Thomas Sailer | 2021-12-15 | 1 | -0/+19 |
| | | | | | | | | | | | The preprocessor currently destroys double slash containing escaped identifiers (for example \a//b ). This is due to next_token trying to convert single line comments (//) into /* */ comments. This then leads to an unintuitive error message like this: ERROR: syntax error, unexpected '*' This patch fixes the error by recognizing escaped identifiers and returning them as single token. It also adds a testcase. | ||||
* | Fix the tests we just broke | Claire Xenia Wolf | 2021-12-10 | 6 | -10/+10 |
| | | | | Signed-off-by: Claire Xenia Wolf <claire@clairexen.net> | ||||
* | Add gitignore for gatemate | Miodrag Milanovic | 2021-12-03 | 1 | -0/+4 |
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