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* Update mul test to DSP48E1Eddie Hung2019-10-171-9/+2
* Update area for div_modEddie Hung2019-10-171-6/+6
* Add comment for lack of tristate logic pointing to #1225Eddie Hung2019-10-171-1/+1
* Move $x to end as 7f0eec8Eddie Hung2019-10-171-1/+1
* adffs test update (equiv_opt -multiclock)SergeyDegtyar2019-10-171-5/+6
* Fix div_mod testSergey2019-10-171-1/+1
* Fix div_mod testSergey2019-10-171-1/+1
* Fix div_mod testSergey2019-10-171-1/+1
* Fix div_mod testSergey2019-10-171-1/+1
* Fix div_mod testSergey2019-10-171-1/+1
* Fix div_mod testSergey2019-10-171-1/+1
* Add comment with expected behavior for latches,tribuf tests;Update adffs testSergeyDegtyar2019-10-174-14/+11
* Fix latches.ys testSergeyDegtyar2019-10-171-4/+3
* Remove xilinx_ug901 tests (will be moved to yosys-tests)SergeyDegtyar2019-10-1788-2962/+0
* Add smoke tests to tests/xilinxSergeyDegtyar2019-10-1729-9/+654
* Add comments for unproven cells.SergeyDegtyar2019-10-173-2/+3
* Add tests for Xilinx UG901 examplesSergeyDegtyar2019-10-1788-0/+2961
* Use "(id)" instead of "id" for types as temporary hackClifford Wolf2019-10-1410-0/+125
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| * sv: Improve testsDavid Shah2019-10-038-7/+30
| * sv: Add test scripts for typedefsDavid Shah2019-10-034-0/+30
| * sv: Add support for memories of a typedefDavid Shah2019-10-031-0/+10
| * sv: Add support for memory typedefsDavid Shah2019-10-031-0/+10
| * sv: Fix typedefs in packagesDavid Shah2019-10-031-0/+11
| * sv: Fix typedef parametersDavid Shah2019-10-032-3/+22
| * sv: Switch parser to glr, prep for typedefDavid Shah2019-10-031-0/+22
* | Revert "Add test that is expecting to fail"Eddie Hung2019-10-081-20/+0
* | Merge pull request #1432 from YosysHQ/eddie/fix1427Eddie Hung2019-10-082-2/+60
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| * | Use `sat -tempinduct` and comments for why equiv_opt not sufficientEddie Hung2019-10-031-1/+8
| * | Fix broken CI, check reset even for constants, trim rstmuxEddie Hung2019-10-021-2/+2
| * | Fix testEddie Hung2019-10-021-2/+12
| * | Merge branch 'eddie/fix_sat_init' into eddie/fix1427Eddie Hung2019-10-021-0/+20
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| | * | Add test that is expecting to failEddie Hung2019-10-021-0/+20
| * | | Update testEddie Hung2019-10-021-13/+3
| * | | Add testEddie Hung2019-10-021-0/+31
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* | | Merge pull request #1433 from YosysHQ/eddie/equiv_opt_async2syncEddie Hung2019-10-082-9/+4
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| * | | Disable equiv check for ice40 latchesEddie Hung2019-10-031-6/+3
| * | | Use equiv_opt -async2sync for xilinxEddie Hung2019-10-031-3/+1
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* | | Missing 'accept' at end of ice40_wrapcarry, spotted by @cliffordwolfEddie Hung2019-10-051-0/+22
* | | Merge pull request #1422 from YosysHQ/eddie/aigmap_selectClifford Wolf2019-10-031-0/+10
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| * | Add quick testEddie Hung2019-09-301-0/+10
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* | Extend test with renaming cells with prefix tooEddie Hung2019-10-021-0/+2
* | Add testEddie Hung2019-09-301-0/+16
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* Merge pull request #1406 from whitequark/connect_rpcwhitequark2019-09-306-0/+152
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| * rpc: new frontend.whitequark2019-09-306-0/+152
* | Add latch test modified from #1363Eddie Hung2019-09-302-0/+73
* | Merge pull request #1359 from YosysHQ/xc7dspEddie Hung2019-09-2910-11/+325
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| * \ Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-09-231-0/+62
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| * | | Add more complicated macc testcaseEddie Hung2019-09-192-5/+39
| * | | Add mac.sh and macc_tb.v for testingEddie Hung2019-09-192-0/+99
| * | | Merge remote-tracking branch 'origin/clifford/fix1381' into xc7dspEddie Hung2019-09-191-0/+41
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