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Author
Age
Files
Lines
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tests: remove write_ilang
Eddie Hung
2020-04-20
2
-3
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+0
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synth_intel_alm: alternative synthesis for Intel FPGAs
Dan Ravensloft
2020-04-15
10
-0
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+208
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Merge pull request #1603 from whitequark/ice40-ram_style
whitequark
2020-04-10
5
-35
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+551
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ecp5: do not map FFRAM if explicitly requested otherwise.
whitequark
2020-04-03
1
-16
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+62
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ice40: do not map FFRAM if explicitly requested otherwise.
whitequark
2020-04-03
1
-8
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+28
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ecp5: add support for both 1364.1 and LSE RAM/ROM attributes.
whitequark
2020-02-06
3
-5
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+305
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ice40: match memory inference attribute values case insensitive.
whitequark
2020-02-06
1
-0
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+6
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ice40: add support for both 1364.1 and LSE RAM/ROM attributes.
whitequark
2020-02-06
3
-20
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+179
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ice40: remove impossible test.
whitequark
2020-02-06
1
-15
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+0
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Merge pull request #1790 from YosysHQ/eddie/opt_expr_xor
Eddie Hung
2020-04-01
2
-7
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+3
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Simplify breaking tests/arch/*/fsm.ys tests
Eddie Hung
2020-03-20
2
-7
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+3
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fix argument order for macOS compatibility
N. Engelhardt
2020-03-18
1
-3
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+3
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tests: extend tests/arch/run-tests.sh for defines
Eddie Hung
2020-03-05
1
-3
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+14
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Merge pull request #1718 from boqwxp/precise_locations
Claire Wolf
2020-03-03
1
-2
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+2
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Change attribute search value to specify precise location instead of simple l...
Alberto Gonzalez
2020-02-24
1
-2
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+2
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Revert "Fix tests/arch/xilinx/fsm.ys to count flops only"
Eddie Hung
2020-02-27
1
-3
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+9
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Cleanup tests
Eddie Hung
2020-02-27
1
-0
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+18
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Update bug1630.ys to use -lut 4 instead of lut file
Eddie Hung
2020-02-27
1
-1
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+1
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Fix tests/arch/xilinx/fsm.ys to count flops only
Eddie Hung
2020-02-27
1
-9
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+3
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xilinx: Add support for LUT RAM on LUT4-based devices.
Marcin Kościelnicki
2020-02-07
1
-0
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+20
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xilinx: Initial support for LUT4 devices.
Marcin Kościelnicki
2020-02-07
3
-1
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+83
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Merge pull request #1650 from YosysHQ/eddie/shiftx2mux
Eddie Hung
2020-02-05
2
-5
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+5
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Merge remote-tracking branch 'origin/master' into eddie/shiftx2mux
Eddie Hung
2020-02-05
7
-28
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+173
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Update tests with reduced area
Eddie Hung
2020-01-21
2
-6
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+6
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abc9_ops: -reintegrate to use derived_type for box_ports
Eddie Hung
2020-02-05
1
-1
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+21
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Add opt_lut_ins pass. (#1673)
Marcelina Kościelnicka
2020-02-03
3
-4
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+61
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Merge pull request #1559 from YosysHQ/efinix_test_fix
Miodrag Milanović
2020-01-29
1
-1
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+1
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Updated test to use assert-max
Miodrag Milanovic
2020-01-28
1
-1
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+1
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Fix for non-deterministic test
Miodrag Milanovic
2019-12-07
1
-1
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+1
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Merge pull request #1660 from YosysHQ/eddie/abc9_unpermute_luts
Eddie Hung
2020-01-28
2
-0
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+102
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Import tests from #1628
Eddie Hung
2020-01-27
2
-0
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+102
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Merge pull request #1573 from YosysHQ/eddie/xilinx_tristate
N. Engelhardt
2020-01-28
1
-0
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+5
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Add test
Eddie Hung
2019-12-12
1
-0
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+5
*
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ice40: reduce ABC9 internal fanout warnings with a param for CI->I3
Eddie Hung
2020-01-24
1
-23
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+4
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xilinx_dsp: another typo; move xilinx specific test
Eddie Hung
2020-01-17
1
-0
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+11
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ice40_dsp: fix typo
Eddie Hung
2020-01-17
1
-0
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+11
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Add #1644 testcase
Eddie Hung
2020-01-17
2
-0
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+2
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ice40_dsp: add test
Eddie Hung
2020-01-17
1
-0
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+11
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Merge pull request #1632 from YosysHQ/eddie/fix1630
Eddie Hung
2020-01-14
2
-0
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+2
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Add #1630 testcase
Eddie Hung
2020-01-13
2
-0
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+2
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Merge pull request #1623 from YosysHQ/mmicko/edif_attr
Miodrag Milanović
2020-01-14
3
-9
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+8
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this one is fine
Miodrag Milanovic
2020-01-10
1
-3
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+3
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Fix tests
Miodrag Milanovic
2020-01-10
3
-12
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+11
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Add #1626 testcase
Eddie Hung
2020-01-12
1
-0
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+217
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Merge remote-tracking branch 'origin/master' into eddie/abc9_mfs
Eddie Hung
2020-01-07
2
-0
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+123
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Combine tests to check multiple clock domains
Eddie Hung
2020-01-02
1
-33
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+10
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Merge remote-tracking branch 'origin/master' into xaig_dff
Eddie Hung
2020-01-02
10
-11
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+31
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Add some abc9 dff tests
Eddie Hung
2019-12-31
1
-0
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+55
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Add -D DFF_MODE to abc9_map test
Eddie Hung
2019-12-30
1
-4
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+4
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Merge remote-tracking branch 'origin/master' into xaig_dff
Eddie Hung
2019-12-30
24
-57
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+224
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