| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | xilinx: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 1 | -8/+9 |
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| * | xilinx: Add support for LUT RAM on LUT4-based devices. | Marcin Kościelnicki | 2020-02-07 | 1 | -0/+20 |
| | | | | | | | | There are multiple other kinds of RAMs supported on these devices, but RAM16X1D is the only dual-port one. Fixes #1549 | ||||
| * | Make test without iopads | Miodrag Milanovic | 2019-12-28 | 1 | -7/+7 |
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| * | Revert "Fix xilinx tests, when iopads are default" | Miodrag Milanovic | 2019-12-28 | 1 | -7/+7 |
| | | | | | This reverts commit 477e43d921d204c6bc6403109fea6506802c948c. | ||||
| * | Fix xilinx tests, when iopads are default | Miodrag Milanovic | 2019-12-21 | 1 | -7/+7 |
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| * | Disable RAM16X1D test | Eddie Hung | 2019-12-13 | 1 | -17/+17 |
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| * | Remove extraneous synth_xilinx call | Eddie Hung | 2019-12-12 | 1 | -2/+0 |
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| * | Add tests for these new models | Eddie Hung | 2019-12-12 | 1 | -0/+40 |
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| * | Rename memory tests to lutram, add more xilinx tests | Eddie Hung | 2019-12-12 | 1 | -0/+99 |
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index : iCE40/yosys | |
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