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Author
Age
Files
Lines
*
install *_nowide.lut files
Eddie Hung
2019-06-29
2
-0
/
+3
*
Remove peepopt call in synth_xilinx since already in synth -run coarse
Eddie Hung
2019-06-28
1
-5
/
+0
*
Update synth_ice40 -device doc to be relevant for -abc9 only
Eddie Hung
2019-06-28
1
-2
/
+2
*
Disable boxing of ECP5 dist RAM due to regression
Eddie Hung
2019-06-28
1
-1
/
+1
*
Add write address to abc_scc_break of ECP5 dist RAM
Eddie Hung
2019-06-28
1
-1
/
+1
*
Fix DO4 typo
Eddie Hung
2019-06-28
1
-1
/
+1
*
Reduce diff with upstream
Eddie Hung
2019-06-27
1
-4
/
+2
*
Extraneous newline
Eddie Hung
2019-06-27
1
-1
/
+0
*
Remove noise from ice40/cells_sim.v
Eddie Hung
2019-06-27
1
-5
/
+0
*
Refactor for one "abc_carry" attribute on module
Eddie Hung
2019-06-27
3
-9
/
+7
*
Remove redundant doc
Eddie Hung
2019-06-27
1
-3
/
+0
*
Add warning if synth_xilinx -abc9 with family != xc7
Eddie Hung
2019-06-27
1
-0
/
+2
*
Merge origin/master
Eddie Hung
2019-06-27
4
-51
/
+100
*
Add WE to ECP5 dist RAM's abc_scc_break too
Eddie Hung
2019-06-26
1
-1
/
+1
*
Update comment on boxes
Eddie Hung
2019-06-26
2
-4
/
+6
*
Add "WE" to dist RAM's abc_scc_break
Eddie Hung
2019-06-26
1
-3
/
+3
*
Remove unused var
Eddie Hung
2019-06-26
1
-1
/
+1
*
Add _nowide variants of LUT libraries in -nowidelut flows
Eddie Hung
2019-06-26
4
-13
/
+44
*
Merge branch 'xaig' of github.com:YosysHQ/yosys into xaig
Eddie Hung
2019-06-26
1
-2
/
+10
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*
abc9: Add wire delays to synth_ice40
David Shah
2019-06-26
1
-2
/
+10
*
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Merge branch 'koriakin/xc7nocarrymux' into xaig
Eddie Hung
2019-06-26
2
-9
/
+26
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*
synth_ecp5 rename -nomux to -nowidelut, but preserve former
Eddie Hung
2019-06-26
1
-6
/
+6
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*
Merge branch 'xc7nocarrymux' of https://github.com/koriakin/yosys into koriak...
Eddie Hung
2019-06-26
1
-4
/
+24
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\
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*
synth_xilinx: Add -nocarry and -nomux options.
Marcin KoĆcielnicki
2019-04-30
1
-7
/
+26
*
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Realistic delays for RAM32X1D too
Eddie Hung
2019-06-25
1
-2
/
+2
*
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Add RAM32X1D box info
Eddie Hung
2019-06-25
2
-4
/
+12
*
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Merge remote-tracking branch 'origin/master' into xaig
Eddie Hung
2019-06-25
5
-8
/
+72
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*
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Add RAM32X1D support
Eddie Hung
2019-06-24
5
-20
/
+73
*
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Use LUT delays for dist RAM delays
Eddie Hung
2019-06-24
1
-4
/
+4
*
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Re-enable dist RAM boxes for ECP5
Eddie Hung
2019-06-24
1
-1
/
+1
*
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Revert "Re-enable dist RAM boxes for ECP5"
Eddie Hung
2019-06-24
1
-1
/
+1
*
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Re-enable dist RAM boxes for ECP5
Eddie Hung
2019-06-24
1
-1
/
+1
*
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Add Xilinx dist RAM as comb boxes
Eddie Hung
2019-06-24
2
-0
/
+16
*
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Add comments to ecp5 box
Eddie Hung
2019-06-22
1
-0
/
+6
*
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Add comment to xc7 box
Eddie Hung
2019-06-22
1
-0
/
+3
*
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Fix and cleanup ice40 boxes for carry in/out
Eddie Hung
2019-06-22
4
-313
/
+25
*
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Carry in/out box ordering now move to end, not swap with end
Eddie Hung
2019-06-22
1
-12
/
+12
*
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Remove DFF and RAMD box info for now
Eddie Hung
2019-06-21
2
-36
/
+0
*
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Merge remote-tracking branch 'origin/master' into xaig
Eddie Hung
2019-06-21
1
-4
/
+5
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*
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ecp5: Improve mapping of $alu when BI is used
David Shah
2019-06-21
1
-4
/
+5
*
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Merge remote-tracking branch 'origin/master' into xaig
Eddie Hung
2019-06-20
1
-1
/
+1
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\
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*
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Fixed small typo in ice40_unlut help summary
acw1251
2019-06-19
1
-1
/
+1
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*
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Fixed the help summary line for a few commands
acw1251
2019-06-19
1
-1
/
+1
*
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Call opt_expr -mux_undef to get rid of 1'bx in muxes prior to abc
Eddie Hung
2019-06-20
1
-0
/
+1
*
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Really permute Xilinx LUT mappings as default LUT6.I5:A6
Eddie Hung
2019-06-18
1
-16
/
+16
*
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Revert "Fix (do not) permute LUT inputs, but permute mux selects"
Eddie Hung
2019-06-18
1
-33
/
+31
*
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Clean up
Eddie Hung
2019-06-18
1
-6
/
+4
*
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Fix (do not) permute LUT inputs, but permute mux selects
Eddie Hung
2019-06-18
1
-31
/
+33
*
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Fix copy-pasta issue
Eddie Hung
2019-06-17
1
-9
/
+8
*
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Permute INIT for +/xilinx/lut_map.v
Eddie Hung
2019-06-17
1
-32
/
+58
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