| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | nexus: Add make_transp to BRAMs | David Shah | 2020-10-22 | 1 | -0/+3 |
| * | Merge pull request #2405 from byuccl/fix_xilinx_cells | clairexen | 2020-10-20 | 1 | -2/+2 |
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| | * | Move signal declarations to before first use | Jeff Goeders | 2020-10-19 | 1 | -2/+2 |
| * | | synth_nexus: Initial implementation | David Shah | 2020-10-15 | 14 | -0/+12229 |
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| * | xilinx: do not make DSP48E1 a whitebox for ABC9 by default (#2325) | Eddie Hung | 2020-09-23 | 2 | -17/+65 |
| * | intel_alm: better map wide but shallow multiplies | Dan Ravensloft | 2020-08-28 | 1 | -2/+6 |
| * | intel_alm: Add multiply signedness to cells | Dan Ravensloft | 2020-08-26 | 5 | -10/+103 |
| * | synth_intel: Remove incomplete Arria 10 GX support. | Marcelina Kościelnicka | 2020-08-21 | 5 | -192/+4 |
| * | intel: move Cyclone V support to intel_alm | Dan Ravensloft | 2020-08-20 | 7 | -203/+11 |
| * | Merge pull request #2347 from YosysHQ/mwk/techmap-shift-fixes | clairexen | 2020-08-20 | 1 | -67/+35 |
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| | * | techmap/shift_shiftx: Remove the "shiftx2mux" special path. | Marcelina Kościelnicka | 2020-08-20 | 1 | -67/+35 |
| * | | Merge pull request #2319 from YosysHQ/mwk/techmap-celltype-pattern | clairexen | 2020-08-20 | 2 | -4/+4 |
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| | * | techmap: Add support for [] wildcards in techmap_celltype. | Marcelina Kościelnicka | 2020-08-02 | 2 | -4/+4 |
| * | | Respect \A_SIGNED for $shift | Xiretza | 2020-08-18 | 2 | -6/+16 |
| * | | intel_alm: fix typo in MISTRAL_MUL27X27 cell name | Dan Ravensloft | 2020-08-13 | 1 | -1/+1 |
| * | | intel_alm: add more megafunctions. NFC. | Dan Ravensloft | 2020-08-12 | 1 | -0/+431 |
| * | | Replace opt_rmdff with opt_dff. | Marcelina Kościelnicka | 2020-08-07 | 7 | -29/+26 |
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| * | opt_expr: Remove -clkinv option, make it the default. | Marcelina Kościelnicka | 2020-07-31 | 2 | -2/+2 |
| * | synth_ice40: Use opt_dff. | Marcelina Kościelnicka | 2020-07-30 | 4 | -142/+6 |
| * | synth_xilinx: Use opt_dff. | Marcelina Kościelnicka | 2020-07-30 | 1 | -17/+12 |
| * | intel_alm: direct M10K instantiation | Dan Ravensloft | 2020-07-27 | 7 | -39/+127 |
| * | intel_alm: increase abc9 -W | Dan Ravensloft | 2020-07-26 | 1 | -1/+1 |
| * | Merge pull request #2294 from Ravenslofty/intel_alm_timings | clairexen | 2020-07-23 | 4 | -72/+91 |
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| | * | intel_alm: add additional ABC9 timings | Dan Ravensloft | 2020-07-23 | 4 | -72/+91 |
| * | | Remove EXPLICIT_CARRY logic. | Keith Rothman | 2020-07-23 | 3 | -150/+2 |
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| * | sf2: Emit CLKINT even if -clkbuf not passed | Marcelina Kościelnicka | 2020-07-17 | 1 | -2/+6 |
| * | Merge pull request #2274 from YosysHQ/mwk/anlogic-ff-fix | Miodrag Milanović | 2020-07-17 | 1 | -12/+12 |
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| | * | anlogic: Fix FF mapping. | Marcelina Kościelnicka | 2020-07-17 | 1 | -12/+12 |
| * | | Merge pull request #2229 from Ravenslofty/sf2_remove_sf2_iobs | clairexen | 2020-07-16 | 4 | -214/+135 |
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| | * | sf2: replace sf2_iobs with {clkbuf,iopad}map | Dan Ravensloft | 2020-07-09 | 4 | -214/+135 |
| * | | Merge pull request #2238 from YosysHQ/mwk/dfflegalize-anlogic | Miodrag Milanović | 2020-07-16 | 3 | -50/+35 |
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| | * | | anlogic: Use dfflegalize. | Marcelina Kościelnicka | 2020-07-14 | 3 | -50/+35 |
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| * | | Merge pull request #2226 from YosysHQ/mwk/nuke-efinix-gbuf | Miodrag Milanović | 2020-07-16 | 5 | -122/+11 |
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| | * | | efinix: Nuke efinix_gbuf in favor of clkbufmap. | Marcelina Kościelnicka | 2020-07-04 | 5 | -122/+11 |
| * | | | achronix: Use dfflegalize. | Marcelina Kościelnicka | 2020-07-14 | 1 | -1/+1 |
| * | | | intel: Use dfflegalize. | Marcelina Kościelnicka | 2020-07-13 | 8 | -178/+17 |
| * | | | Revert "intel_alm: direct M10K instantiation" | Lofty | 2020-07-13 | 7 | -122/+38 |
| * | | | xilinx: Fix srl regression. | Marcelina Kościelnicka | 2020-07-12 | 1 | -2/+2 |
| * | | | sf2: Use dfflegalize. | Marcelina Kościelnicka | 2020-07-09 | 2 | -44/+13 |
| * | | | xilinx: Use dfflegalize. | Marcelina Kościelnicka | 2020-07-09 | 6 | -484/+131 |
| * | | | efinix: Use dfflegalize. | Marcelina Kościelnicka | 2020-07-06 | 2 | -15/+53 |
| * | | | gowin: Use dfflegalize. | Marcelina Kościelnicka | 2020-07-06 | 2 | -145/+41 |
| * | | | intel_alm: direct M10K instantiation | Dan Ravensloft | 2020-07-05 | 7 | -38/+122 |
| * | | | synth_gowin: ABC9 support | Dan Ravensloft | 2020-07-05 | 2 | -34/+340 |
| * | | | Merge pull request #2236 from YosysHQ/mwk/dfflegalize-ice40 | Marcelina Kościelnicka | 2020-07-05 | 4 | -208/+24 |
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| | * | | | ice40: Use dfflegalize. | Marcelina Kościelnicka | 2020-07-05 | 4 | -208/+24 |
| * | | | | ecp5: Use dfflegalize. | Marcelina Kościelnicka | 2020-07-05 | 4 | -254/+96 |
| * | | | | Merge pull request #2232 from YosysHQ/mwk/gowin-sim-init | Marcelina Kościelnicka | 2020-07-05 | 1 | -8/+8 |
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| | * | | | | gowin: Fix INIT values in sim library. | Marcelina Kościelnicka | 2020-07-05 | 1 | -8/+8 |
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| * | | | | intel_alm: DSP inference | Dan Ravensloft | 2020-07-05 | 6 | -9/+186 |
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