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* RST -> RSTBRST for RAMB8BWEREddie Hung2019-07-291-3/+3
* xilinx: Fix missing cell name underscore in cells_map.vDavid Shah2019-07-251-2/+2
* Merge pull request #1182 from koriakin/xc6s-bramEddie Hung2019-07-119-8/+598
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| * synth_xilinx: Initial Spartan 6 block RAM inference support.Marcin Kościelnicki2019-07-119-8/+598
* | xilinx: Fix the default values for FDPE/FDSE INIT attributes to match ISE/Viv...Marcin Kościelnicki2019-07-112-6/+6
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* Merge pull request #1180 from YosysHQ/eddie/no_abc9_retimeEddie Hung2019-07-101-5/+8
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| * Error out if -abc9 and -retime specifiedEddie Hung2019-07-101-5/+8
* | Add some spacingEddie Hung2019-07-101-9/+9
* | Add some ASCII art explaining mux decompositionEddie Hung2019-07-101-0/+21
* | Call muxpack and pmux2shiftx before cmp2lutEddie Hung2019-07-091-9/+12
* | Restore opt_clean back to original placeEddie Hung2019-07-091-2/+1
* | Restore missing techmap -map +/cmp2lut.v with LUT_WIDTH=6Eddie Hung2019-07-091-0/+2
* | Extend using A[1] to preserve don't careEddie Hung2019-07-091-1/+9
* | Extend during mux decomposition with 1'bxEddie Hung2019-07-091-24/+3
* | Fix typo and commentsEddie Hung2019-07-091-4/+4
* | Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-07-091-19/+25
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| * Merge branch 'eddie/script_from_wire' into eddie/xc7srl_cleanupEddie Hung2019-07-021-0/+2
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| * | Cleanup SRL inference/make more consistentEddie Hung2019-06-291-19/+25
* | | synth_xilinx to call commands of synth -coarse directlyEddie Hung2019-07-091-3/+20
* | | Revert "synth_xilinx to call "synth -run coarse" with "-keepdc""Eddie Hung2019-07-091-2/+2
* | | Fix spacingEddie Hung2019-07-091-1/+1
* | | Fix spacingEddie Hung2019-07-091-1/+1
* | | Decompose mux inputs in delay-orientated (rather than area) fashionEddie Hung2019-07-081-18/+30
* | | Do not call opt -mux_undef (part of -full) before muxcoverEddie Hung2019-07-081-1/+5
* | | Add one more commentEddie Hung2019-07-081-0/+3
* | | Less thinkingEddie Hung2019-07-081-3/+3
* | | RewordEddie Hung2019-07-081-2/+2
* | | synth_xilinx to call "synth -run coarse" with "-keepdc"Eddie Hung2019-07-081-2/+2
* | | Map $__XILINX_SHIFTX in a more balanced mannerEddie Hung2019-07-081-36/+49
* | | CapitalisationEddie Hung2019-07-081-1/+1
* | | Add synth_xilinx -widemux recommended valueEddie Hung2019-07-081-1/+1
* | | Fixes for 2:1 muxesEddie Hung2019-07-082-5/+30
* | | synth_xilinx -widemux=2 is minimum nowEddie Hung2019-07-081-4/+7
* | | Parametric muxcover costs as per @daveshah1Eddie Hung2019-07-081-16/+14
* | | atoi -> stoi as per @daveshah1Eddie Hung2019-07-081-1/+1
* | | Fix $__XILINX_MUXF78 box timingEddie Hung2019-07-011-1/+1
* | | Revert "Fix broken MUXFx box, use MUXF7x2 box instead"Eddie Hung2019-07-013-37/+36
* | | Fix broken MUXFx box, use MUXF7x2 box insteadEddie Hung2019-07-013-36/+37
* | | Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-06-292-16/+8
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| * | install *_nowide.lut filesEddie Hung2019-06-291-0/+2
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| * Remove peepopt call in synth_xilinx since already in synth -run coarseEddie Hung2019-06-281-5/+0
* | Restore $__XILINX_MUXF78 const optimisationEddie Hung2019-06-281-24/+24
* | Clean up trimming leading 1'bx in A during techmappnigEddie Hung2019-06-281-15/+9
* | Fix CARRY4 abc_box_idEddie Hung2019-06-281-1/+1
* | Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-06-283-9/+4
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| * Reduce diff with upstreamEddie Hung2019-06-271-4/+2
| * Refactor for one "abc_carry" attribute on moduleEddie Hung2019-06-271-2/+2
| * Remove redundant docEddie Hung2019-06-271-3/+0
* | Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-271-7/+10
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| * Add warning if synth_xilinx -abc9 with family != xc7Eddie Hung2019-06-271-0/+2
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