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| author | Eddie Hung <eddie@fpgeh.com> | 2019-07-01 14:04:06 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-07-01 14:04:06 -0700 |
| commit | 2ea6083b7ecea979838c2be40f5f7ef907f553d6 (patch) | |
| tree | 5778b1860ff5d650db3162ebe91cb67f058e4a8a /techlibs/xilinx | |
| parent | 09ac27471667d1316b09984624dde981e860a94e (diff) | |
| download | yosys-2ea6083b7ecea979838c2be40f5f7ef907f553d6.tar.gz yosys-2ea6083b7ecea979838c2be40f5f7ef907f553d6.tar.bz2 yosys-2ea6083b7ecea979838c2be40f5f7ef907f553d6.zip | |
Fix $__XILINX_MUXF78 box timing
Diffstat (limited to 'techlibs/xilinx')
| -rw-r--r-- | techlibs/xilinx/abc_xc7.box | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/xilinx/abc_xc7.box b/techlibs/xilinx/abc_xc7.box index 273d36573..3789ff350 100644 --- a/techlibs/xilinx/abc_xc7.box +++ b/techlibs/xilinx/abc_xc7.box @@ -17,7 +17,7 @@ MUXF8 2 1 3 1 # Inputs: I0 I1 I2 I3 S0 S1 # Outputs: O $__MUXF78 3 1 6 1 -190 193 217 223 296 273 +294 297 311 317 390 273 # CARRY4 + CARRY4_[ABCD]X # Inputs: CYINIT DI0 DI1 DI2 DI3 S0 S1 S2 S3 CI |