aboutsummaryrefslogtreecommitdiffstats
path: root/techlibs/xilinx/synth_xilinx.cc
Commit message (Expand)AuthorAgeFilesLines
* Merge remote-tracking branch 'origin/master' into eddie/abc9_mfsEddie Hung2020-01-071-16/+38
|\
| * synth_xilinx -dff to work with abc tooEddie Hung2020-01-021-6/+14
| * Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2020-01-021-3/+3
| |\
| * | abc9 -keepff -> -dff; refactor dff operationsEddie Hung2020-01-021-3/+3
| * | Restore abc9 -keepffEddie Hung2020-01-011-1/+3
| * | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-12-301-12/+10
| |\ \
| * | | Add "synth_xilinx -dff" option, cleanup abc9Eddie Hung2019-12-301-2/+14
| * | | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-12-191-4/+12
| |\ \ \
| * \ \ \ Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-12-061-9/+8
| |\ \ \ \
| * | | | | Remove clkpartEddie Hung2019-12-051-4/+0
| * | | | | techmap abc_unmap.v before xilinx_srl -fixedEddie Hung2019-12-031-6/+5
| * | | | | clkpart -unpart into 'finalize'Eddie Hung2019-11-281-3/+4
| * | | | | ean call after abc{,9}Eddie Hung2019-11-271-1/+2
| * | | | | Move 'clean' from map_luts to finalizeEddie Hung2019-11-261-1/+1
| * | | | | For abc9, run clkpart before ff_map and after abc9Eddie Hung2019-11-231-0/+2
| * | | | | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-11-191-30/+76
| |\ \ \ \ \
| * \ \ \ \ \ Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-10-081-5/+9
| |\ \ \ \ \ \
| * | | | | | | Remove -D_ABC9Eddie Hung2019-10-071-2/+0
| * | | | | | | abc -> abc9Eddie Hung2019-10-041-3/+3
| * | | | | | | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-10-041-3/+7
| |\ \ \ \ \ \ \
| * | | | | | | | Use read_args for read_verilogEddie Hung2019-10-041-3/+6
| * | | | | | | | Merge remote-tracking branch 'origin/eddie/abc_to_abc9' into xaig_dffEddie Hung2019-10-041-6/+7
| |\ \ \ \ \ \ \ \
| * \ \ \ \ \ \ \ \ Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-09-291-4/+32
| |\ \ \ \ \ \ \ \ \
| * | | | | | | | | | Big rework; flop info now mostly in cells_sim.vEddie Hung2019-09-281-2/+2
* | | | | | | | | | | Re-enable &mfs for synth_{ecp5,xilinx}Eddie Hung2020-01-061-1/+0
| |_|_|_|_|_|_|_|_|/ |/| | | | | | | | |
* | | | | | | | | | Merge pull request #1601 from YosysHQ/eddie/synth_retimeEddie Hung2020-01-021-3/+3
|\ \ \ \ \ \ \ \ \ \ | |_|_|_|_|_|_|_|_|/ |/| | | | | | | | |
| * | | | | | | | | Update doc that "-retime" calls abc with "-dff -D 1"Eddie Hung2019-12-301-1/+1
| * | | | | | | | | Revert "Revert "synth_* with -retime option now calls abc with -D 1 as well""Eddie Hung2019-12-301-2/+2
* | | | | | | | | | Merge remote-tracking branch 'origin/master' into iopad_defaultMiodrag Milanovic2019-12-281-1/+4
|\| | | | | | | | |
| * | | | | | | | | xilinx_dsp: Initial DSP48A/DSP48A1 support.Marcin Kościelnicki2019-12-221-1/+4
* | | | | | | | | | Addressed review commentsMiodrag Milanovic2019-12-211-2/+3
* | | | | | | | | | iopad no op for compatibility with old scriptsMiodrag Milanovic2019-12-211-0/+3
* | | | | | | | | | Make iopad option default for all xilinx flowsMiodrag Milanovic2019-12-211-14/+5
|/ / / / / / / / /
* | | | | | | | | Revert "Optimise write_xaiger"Eddie Hung2019-12-201-5/+0
* | | | | | | | | Merge pull request #1558 from YosysHQ/eddie/xaiger_cleanupEddie Hung2019-12-191-0/+5
|\ \ \ \ \ \ \ \ \ | |_|_|_|_|_|_|_|/ |/| | | | | | | |
| * | | | | | | | techmap/aigmap of whiteboxes to occur before abc9 instead of in write_xaigerEddie Hung2019-12-061-0/+5
| | |_|_|_|_|_|/ | |/| | | | | |
* | | | | | | | xilinx: Add xilinx_dffopt pass (#1557)Marcin Kościelnicki2019-12-181-0/+1
* | | | | | | | xilinx: Improve flip-flop handling.Marcin Kościelnicki2019-12-181-4/+11
|/ / / / / / /
* | | | | | / xilinx: Add tristate buffer mapping. (#1528)Marcin Kościelnicki2019-12-041-9/+8
| |_|_|_|_|/ |/| | | | |
* | | | | | synth_xilinx: Merge blackbox primitive libraries.Marcin Kościelnicki2019-11-061-22/+3
* | | | | | xilinx: Add URAM288 mapping for xcupDavid Shah2019-10-231-1/+23
* | | | | | xilinx: Add support for UltraScale[+] BRAM mappingDavid Shah2019-10-231-1/+6
* | | | | | xilinx: Support multiplier mapping for all families.Marcin Kościelnicki2019-10-221-8/+45
* | | | | | Call memory_dff before DSP mapping to reserve registers (fixes #1447)N. Engelhardt2019-10-171-0/+1
| |_|_|_|/ |/| | | |
* | | | | Merge pull request #1437 from YosysHQ/eddie/abc_to_abc9Eddie Hung2019-10-081-7/+8
|\ \ \ \ \
| * \ \ \ \ Merge branch 'master' into eddie/abc_to_abc9Eddie Hung2019-10-041-3/+7
| |\ \ \ \ \ | | |_|_|/ / | |/| | | / | | | |_|/ | | |/| |
| * | | | Rename abc_* names/attributes to more precisely be abc9_*Eddie Hung2019-10-041-6/+7
| | |_|/ | |/| |
* | | | Add comment on why partial multipliers are 18x18Eddie Hung2019-10-041-4/+8
* | | | Fix typo in check_label()Eddie Hung2019-10-041-1/+1
| |/ / |/| |
* | | Add temporary `abc9 -nomfs` and use for `synth_xilinx -abc9`Eddie Hung2019-10-041-2/+6
|/ /