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| author | Eddie Hung <eddie@fpgeh.com> | 2019-10-04 17:35:43 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-10-04 17:35:43 -0700 |
| commit | 0acc51c3d82f65f73fa9e475c6fc41beabd925a6 (patch) | |
| tree | 449fe75fe133fdf1d56c04a8759ca79274b4909b /techlibs/xilinx/synth_xilinx.cc | |
| parent | 9c238118395ceae76bff59fe1028d43768c79fed (diff) | |
| download | yosys-0acc51c3d82f65f73fa9e475c6fc41beabd925a6.tar.gz yosys-0acc51c3d82f65f73fa9e475c6fc41beabd925a6.tar.bz2 yosys-0acc51c3d82f65f73fa9e475c6fc41beabd925a6.zip | |
Add temporary `abc9 -nomfs` and use for `synth_xilinx -abc9`
Diffstat (limited to 'techlibs/xilinx/synth_xilinx.cc')
| -rw-r--r-- | techlibs/xilinx/synth_xilinx.cc | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc index 7085214de..1cddd2a92 100644 --- a/techlibs/xilinx/synth_xilinx.cc +++ b/techlibs/xilinx/synth_xilinx.cc @@ -477,10 +477,14 @@ struct SynthXilinxPass : public ScriptPass log_warning("'synth_xilinx -abc9' currently supports '-family xc7' only.\n"); run("techmap -map +/xilinx/abc_map.v -max_iter 1"); run("read_verilog -icells -lib +/xilinx/abc_model.v"); + std::string abc9_opts = " -box +/xilinx/abc_xc7.box"; + abc9_opts += stringf(" -W %d", XC7_WIRE_DELAY); + abc9_opts += " -nomfs"; if (nowidelut) - run("abc9 -lut +/xilinx/abc_xc7_nowide.lut -box +/xilinx/abc_xc7.box -W " + std::to_string(XC7_WIRE_DELAY)); + abc9_opts += " -lut +/xilinx/abc_xc7_nowide.lut"; else - run("abc9 -lut +/xilinx/abc_xc7.lut -box +/xilinx/abc_xc7.box -W " + std::to_string(XC7_WIRE_DELAY)); + abc9_opts += " -lut +/xilinx/abc_xc7.lut"; + run("abc9" + abc9_opts); } else { if (nowidelut) |