iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Add force_downto and force_upto wire attributes.	Marcelina Kościelnicka	2020-05-19	1	-0/+3
*	Change synth_xilinx's -nomux to -minmuxf <int>	Eddie Hung	2019-06-24	1	-1/+1
*	Remove $_MUX4_ techmap rule	Eddie Hung	2019-06-21	1	-11/+0
*	Simplify and comment out mux_map.v	Eddie Hung	2019-06-21	1	-6/+11
*	mux_map to no longer copy last value into 1'bx	Eddie Hung	2019-06-21	1	-19/+2
*	Fix spacing again, A_forward -> A_backward	Eddie Hung	2019-06-21	1	-38/+40
*	Revert B_SIGNED optimisation, since only works for Y_WIDTH==1	Eddie Hung	2019-06-21	1	-4/+3
*	Fix spacing	Eddie Hung	2019-06-21	1	-15/+15
*	Since muxcover uses MUX4s, blast them back to gates here	Eddie Hung	2019-06-21	1	-0/+7
*	mux_map to drop sign bit, and eliminate 'bx-es	Eddie Hung	2019-06-20	1	-13/+47
*	Revert "Remove wide mux inference"	Eddie Hung	2019-06-14	1	-0/+52
*	Remove wide mux inference	Eddie Hung	2019-06-12	1	-52/+0
*	$__XILINX_MUX_ -> $__XILINX_SHIFTX	Eddie Hung	2019-06-06	1	-2/+2
*	Add mux_map.v for wide mux	Eddie Hung	2019-06-04	1	-0/+52