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| author | Eddie Hung <eddie@fpgeh.com> | 2019-06-24 10:04:01 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-24 10:04:01 -0700 |
| commit | 36e6da53964b406ad379a60fc289aa3af9beb8a9 (patch) | |
| tree | 53e9e9bc0223559c000a731b1b6fc76e9d466b1a /techlibs/xilinx/mux_map.v | |
| parent | d54dceb547777ab4b489f66554d4c47e867424f9 (diff) | |
| download | yosys-36e6da53964b406ad379a60fc289aa3af9beb8a9.tar.gz yosys-36e6da53964b406ad379a60fc289aa3af9beb8a9.tar.bz2 yosys-36e6da53964b406ad379a60fc289aa3af9beb8a9.zip | |
Change synth_xilinx's -nomux to -minmuxf <int>
Diffstat (limited to 'techlibs/xilinx/mux_map.v')
| -rw-r--r-- | techlibs/xilinx/mux_map.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/xilinx/mux_map.v b/techlibs/xilinx/mux_map.v index e28070359..91aaf2118 100644 --- a/techlibs/xilinx/mux_map.v +++ b/techlibs/xilinx/mux_map.v @@ -54,7 +54,7 @@ module \$shiftx (A, B, Y); wire _TECHMAP_FAIL_ = 1; end else begin - if (B_WIDTH < 3 || A_WIDTH <= 4) + if (((A_WIDTH + Y_WIDTH - 1) / Y_WIDTH) < `MIN_MUX_INPUTS) wire _TECHMAP_FAIL_ = 1; else \$__XILINX_SHIFTX #( |