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* Merge branch 'eddie/xilinx_lutram' of github.com:YosysHQ/yosys into eddie/xil...Eddie Hung2019-12-161-2/+8
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| * Populate DID/DOD even if unusedEddie Hung2019-12-161-2/+8
* | Rename *RAM{32,64}M rules to RAM{32X2,64X1}QEddie Hung2019-12-161-2/+2
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* Add RAM32X6SDP and RAM64X3SDP modesEddie Hung2019-12-121-8/+80
* Add memory rules for RAM16X1D, RAM32M, RAM64MEddie Hung2019-12-121-0/+104
* Work in progress for renaming labels/options in synth_xilinxEddie Hung2019-07-181-0/+97