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* gatemate: Enable register initializationPatrick Urban2023-02-153-8/+16
* gatemate: Update CC_PLL parametersPatrick Urban2023-02-141-0/+3
* gatemate: Add CC_USR_RSTN primitivePatrick Urban2023-02-141-0/+6
* gatemate: Ensure compatibility of LVDS ports with VHDLPatrick Urban2023-02-141-12/+12
* Fix static initialization, fixes mingw buildMiodrag Milanovic2022-07-041-20/+21
* gatemate: Add LUT tree library scriptgatecat2022-06-276-6/+591
* gatemate: Add preliminary sim models for LUT tree structuresgatecat2022-06-271-0/+44
* gatemate: Fix minor issues with `memory_libmap` (#3343)Patrick Urban2022-05-272-28/+39
* gatemate: Use `memory_libmap` pass.Marcelina Kościelnicka2022-05-183-781/+927
* synth_gatemate Revert cascade A/B port mixupPatrick Urban2021-11-132-12/+4
* synth_gatemate: Remove iob_map invokationPatrick Urban2021-11-131-1/+0
* synth_gatemate: Add block RAM cascade supportPatrick Urban2021-11-132-112/+96
* synth_gatemate: Remove obsolete iob_mapPatrick Urban2021-11-133-61/+2
* synth_gatemate: Update passPatrick Urban2021-11-131-65/+25
* synth_gatemate: Remove specify blocksPatrick Urban2021-11-131-92/+0
* synth_gatemate: Remove gatemate_bramopt passPatrick Urban2021-11-133-148/+0
* synth_gatemate: Revise block RAM read modes and initializationPatrick Urban2021-11-133-71/+230
* synth_gatemate: Remove unsupported FF initializationPatrick Urban2021-11-131-2/+0
* synth_gatemate: Rename multiplier factor parametersPatrick Urban2021-11-131-13/+10
* synth_gatemate: Registers are uninitializedPatrick Urban2021-11-132-3/+3
* synth_gatemate: Apply review remarksPatrick Urban2021-11-135-279/+211
* synth_gatemate: Apply review remarksPatrick Urban2021-11-135-141/+86
* synth_gatemate: Initial implementationPatrick Urban2021-11-1315-0/+3716
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