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Author
Age
Files
Lines
...
*
Added $_MUX4_, $_MUX8_, and $_MUX16_ cell types
Clifford Wolf
2015-04-05
1
-0
/
+29
*
Added $assume cell type
Clifford Wolf
2015-02-26
1
-1
/
+18
*
Added "stat" to "synth" and "synth_xilinx"
Clifford Wolf
2015-02-15
1
-0
/
+2
*
Added final checks to "synth" and "synth_xilinx"
Clifford Wolf
2015-02-15
1
-7
/
+14
*
Smaller default parameters in $mem simlib model
Clifford Wolf
2015-02-15
1
-2
/
+2
*
Added $meminit support to "memory" command
Clifford Wolf
2015-02-14
1
-3
/
+15
*
Added $meminit cell type
Clifford Wolf
2015-02-14
1
-0
/
+22
*
Added "check" command
Clifford Wolf
2015-02-13
1
-0
/
+4
*
Some test related fixes
Clifford Wolf
2015-02-12
1
-4
/
+4
*
Added "make mklibyosys", some minor API changes
Clifford Wolf
2015-02-01
1
-1
/
+9
*
Added "fsm -encfile"
Clifford Wolf
2015-01-30
1
-2
/
+9
*
Added $equiv cell type
Clifford Wolf
2015-01-19
1
-1
/
+23
*
Added cells.lib
Clifford Wolf
2015-01-16
2
-0
/
+109
*
Added add_share_file Makefile macro
Clifford Wolf
2015-01-08
1
-25
/
+6
*
Progress in memory_bram
Clifford Wolf
2015-01-03
1
-0
/
+3
*
Added proper clkpol support to memory_bram
Clifford Wolf
2015-01-02
1
-1
/
+1
*
New $mem simlib model
Clifford Wolf
2015-01-02
1
-95
/
+36
*
Fixed simlib entries for $memrd and $memwr
Clifford Wolf
2014-12-30
1
-0
/
+2
*
Fixed build with SMALL=1
Clifford Wolf
2014-12-30
1
-0
/
+2
*
Improvements in simplemap api, added $ne $nex $eq $eqx support
Clifford Wolf
2014-12-24
1
-49
/
+5
*
Removed UTF-8 chars from techmap.v
Clifford Wolf
2014-12-12
1
-1
/
+1
*
Added $dffe cell type
Clifford Wolf
2014-12-08
2
-1
/
+20
*
Added $_DFFE_??_ cell types
Clifford Wolf
2014-12-08
1
-0
/
+32
*
Added "abc" label in synth script
Clifford Wolf
2014-10-31
1
-6
/
+12
*
Added "opt -full" alias for all more aggressive optimizations
Clifford Wolf
2014-10-31
1
-2
/
+6
*
Added $_BUF_ cell type
Clifford Wolf
2014-10-03
1
-0
/
+6
*
namespace Yosys
Clifford Wolf
2014-09-27
1
-1
/
+5
*
Improvements in "synth" script
Clifford Wolf
2014-09-18
1
-8
/
+12
*
Fixed $macc simlib model for zero-config
Clifford Wolf
2014-09-16
1
-1
/
+1
*
Added "synth" command
Clifford Wolf
2014-09-14
2
-0
/
+154
*
Using alumacc in techmap.v
Clifford Wolf
2014-09-14
1
-237
/
+33
*
Fixed simlib $macc model for xilinx xsim
Clifford Wolf
2014-09-08
1
-1
/
+15
*
Simplified $fa undef model
Clifford Wolf
2014-09-08
1
-1
/
+1
*
Fixes and cleanups for blackbox.v
Clifford Wolf
2014-09-08
2
-70
/
+73
*
Added $lcu cell type
Clifford Wolf
2014-09-08
2
-74
/
+31
*
Added "$fa" cell type
Clifford Wolf
2014-09-08
2
-0
/
+28
*
Using maccmap for $macc and $mul techmap
Clifford Wolf
2014-09-07
1
-190
/
+16
*
Various bug fixes (related to $macc model testing)
Clifford Wolf
2014-09-06
2
-2
/
+2
*
Added $macc SAT model
Clifford Wolf
2014-09-06
2
-6
/
+6
*
Added $macc simlib model (also use as techmap rule for now)
Clifford Wolf
2014-09-06
2
-0
/
+172
*
Removed $bu0 cell type
Clifford Wolf
2014-09-04
2
-34
/
+5
*
Undef-related fixes in simlib $alu model
Clifford Wolf
2014-09-02
1
-3
/
+6
*
Small bug fixes in $not, $neg, and $shiftx models
Clifford Wolf
2014-09-02
1
-3
/
+2
*
Fixed "test_cell -simlib all"
Clifford Wolf
2014-09-01
1
-2
/
+3
*
Added $lut support in test_cell, techmap, satgen
Clifford Wolf
2014-08-31
1
-0
/
+17
*
Added $alu cell type
Clifford Wolf
2014-08-30
2
-3
/
+47
*
Replaced $__alu CO/CS outputs with full-width CO output
Clifford Wolf
2014-08-30
1
-32
/
+28
*
Using "via_celltype" in $mul carry-save-acc implementation
Clifford Wolf
2014-08-18
1
-34
/
+72
*
Performance fix for new $__lcu techmap rule
Clifford Wolf
2014-08-18
1
-7
/
+5
*
Replaced recursive lcu scheme with bk adder
Clifford Wolf
2014-08-18
1
-61
/
+31
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