| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Add $live and $fair cell types, add support for s_eventually keyword | Clifford Wolf | 2017-02-25 | 1 | -0/+16 |
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| * | Add $cover cell type and SVA cover() support | Clifford Wolf | 2017-02-04 | 1 | -0/+8 |
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| * | Added $anyseq cell type | Clifford Wolf | 2016-10-14 | 1 | -0/+12 |
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| * | Added $global_clock verilog syntax support for creating $ff cells | Clifford Wolf | 2016-10-14 | 2 | -2/+23 |
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| * | Added $ff and $_FF_ cell types | Clifford Wolf | 2016-10-12 | 2 | -1/+14 |
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| * | Added "prep -nokeepdc" | Clifford Wolf | 2016-09-30 | 1 | -4/+12 |
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| * | Added "prep -nomem" | Clifford Wolf | 2016-08-30 | 1 | -6/+16 |
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| * | Removed $aconst cell type | Clifford Wolf | 2016-08-30 | 1 | -12/+0 |
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| * | Removed $predict again | Clifford Wolf | 2016-08-28 | 1 | -8/+0 |
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| * | Added "wreduce -memx" | Clifford Wolf | 2016-08-20 | 1 | -2/+6 |
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| * | Added memory_memx pass, "memory -memx", and "prep -memx" | Clifford Wolf | 2016-08-19 | 1 | -2/+17 |
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| * | Added $anyconst and $aconst | Clifford Wolf | 2016-07-27 | 1 | -0/+24 |
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| * | Added $initstate cell type and vlog function | Clifford Wolf | 2016-07-21 | 1 | -0/+17 |
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| * | After reading the SV spec, using non-standard predict() instead of expect() | Clifford Wolf | 2016-07-21 | 1 | -9/+1 |
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| * | Added basic support for $expect cells | Clifford Wolf | 2016-07-13 | 1 | -0/+16 |
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| * | Added "prep -auto-top" and "synth -auto-top" | Clifford Wolf | 2016-07-11 | 2 | -6/+23 |
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| * | Improved support for $sop cells | Clifford Wolf | 2016-06-17 | 2 | -4/+4 |
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| * | Added $sop cell type and "abc -sop" | Clifford Wolf | 2016-06-17 | 1 | -0/+28 |
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| * | Do not run "wreduce" in "prep -ifx" | Clifford Wolf | 2016-06-08 | 1 | -2/+3 |
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| * | Added "proc_mux -ifx" | Clifford Wolf | 2016-06-06 | 1 | -2/+11 |
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| * | Added "prep -flatten" and "synth -flatten" | Clifford Wolf | 2016-04-24 | 2 | -7/+36 |
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| * | Converted "prep" to ScriptPass | Clifford Wolf | 2016-04-24 | 2 | -60/+47 |
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| * | Added "yosys -D" feature | Clifford Wolf | 2016-04-21 | 2 | -2/+2 |
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| * | Added ScriptPass helper class for script-like passes | Clifford Wolf | 2016-03-31 | 1 | -89/+64 |
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| * | Renamed opt_const to opt_expr | Clifford Wolf | 2016-03-31 | 3 | -6/+6 |
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| * | Added more cell help messages | Clifford Wolf | 2016-03-29 | 1 | -0/+73 |
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| * | Progress in cell library documentation | Clifford Wolf | 2016-02-01 | 1 | -0/+238 |
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| * | Run opt_const before check in default scripts | Clifford Wolf | 2015-12-22 | 2 | -0/+4 |
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| * | Progress on cell help messages | Clifford Wolf | 2015-10-20 | 1 | -18/+114 |
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| * | Progress on cell help messages | Clifford Wolf | 2015-10-17 | 2 | -53/+106 |
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| * | Added "prep" command | Clifford Wolf | 2015-10-14 | 2 | -0/+157 |
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| * | Added more cell descriptions | Clifford Wolf | 2015-10-14 | 1 | -0/+85 |
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| * | Added first help messages for cell types | Clifford Wolf | 2015-10-14 | 4 | -0/+292 |
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| * | Added read-enable to memory model | Clifford Wolf | 2015-09-25 | 1 | -4/+5 |
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| * | Added $tribuf and $_TBUF_ sim models | Clifford Wolf | 2015-08-16 | 2 | -0/+20 |
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| * | Added $tribuf and $_TBUF_ cell types | Clifford Wolf | 2015-08-16 | 1 | -1/+1 |
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| * | Another block of spelling fixes | Larry Doolittle | 2015-08-14 | 3 | -4/+4 |
| | | | | | Smaller this time | ||||
| * | Adjust makefiles to work with out-of-tree builds | Clifford Wolf | 2015-08-12 | 2 | -12/+0 |
| | | | | | This is based on work done by Larry Doolittle | ||||
| * | Added WORDS parameter to $meminit | Clifford Wolf | 2015-07-31 | 1 | -1/+2 |
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| * | Added "synth -nofsm" | Clifford Wolf | 2015-07-02 | 1 | -1/+10 |
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| * | Fixed trailing whitespaces | Clifford Wolf | 2015-07-02 | 4 | -10/+10 |
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| * | Added "synth -nordff -noalumacc" | Clifford Wolf | 2015-06-15 | 1 | -3/+20 |
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| * | Added simplemap $lut support | Clifford Wolf | 2015-04-27 | 1 | -8/+2 |
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| * | make all vector-size related integer params in $mem sim model signed | Clifford Wolf | 2015-04-05 | 1 | -6/+6 |
| | | | | | | | this fixes iverilog crashes such as the following: warning: verinum::as_long() truncated 32 bits to 31, returns 2147483647 draw_net_input.c:711: Error: malloc() ran out of memory. | ||||
| * | Added $_MUX4_, $_MUX8_, and $_MUX16_ cell types | Clifford Wolf | 2015-04-05 | 1 | -0/+29 |
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| * | Added $assume cell type | Clifford Wolf | 2015-02-26 | 1 | -1/+18 |
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| * | Added "stat" to "synth" and "synth_xilinx" | Clifford Wolf | 2015-02-15 | 1 | -0/+2 |
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| * | Added final checks to "synth" and "synth_xilinx" | Clifford Wolf | 2015-02-15 | 1 | -7/+14 |
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| * | Smaller default parameters in $mem simlib model | Clifford Wolf | 2015-02-15 | 1 | -2/+2 |
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| * | Added $meminit support to "memory" command | Clifford Wolf | 2015-02-14 | 1 | -3/+15 |
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index : iCE40/yosys | |
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