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| author | Clifford Wolf <clifford@clifford.at> | 2016-03-31 08:43:28 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2016-03-31 08:46:56 +0200 |
| commit | 1d0f0d668ade740c928c66c400476924abf62384 (patch) | |
| tree | 8215e3fb7c6fd92a8560217e0840a90a39a620e6 /techlibs/common | |
| parent | d31c968d76e99d5c7288d0eb844e041bb36aa77d (diff) | |
| download | yosys-1d0f0d668ade740c928c66c400476924abf62384.tar.gz yosys-1d0f0d668ade740c928c66c400476924abf62384.tar.bz2 yosys-1d0f0d668ade740c928c66c400476924abf62384.zip | |
Renamed opt_const to opt_expr
Diffstat (limited to 'techlibs/common')
| -rw-r--r-- | techlibs/common/prep.cc | 4 | ||||
| -rw-r--r-- | techlibs/common/synth.cc | 4 | ||||
| -rw-r--r-- | techlibs/common/techmap.v | 4 |
3 files changed, 6 insertions, 6 deletions
diff --git a/techlibs/common/prep.cc b/techlibs/common/prep.cc index 8bae920d0..911737947 100644 --- a/techlibs/common/prep.cc +++ b/techlibs/common/prep.cc @@ -69,7 +69,7 @@ struct PrepPass : public Pass { log("\n"); log(" prep:\n"); log(" proc\n"); - log(" opt_const\n"); + log(" opt_expr -keepdc\n"); log(" opt_clean\n"); log(" check\n"); log(" opt -keepdc\n"); @@ -134,7 +134,7 @@ struct PrepPass : public Pass { if (check_label(active, run_from, run_to, "coarse")) { Pass::call(design, "proc"); - Pass::call(design, "opt_const"); + Pass::call(design, "opt_expr -keepdc"); Pass::call(design, "opt_clean"); Pass::call(design, "check"); Pass::call(design, "opt -keepdc"); diff --git a/techlibs/common/synth.cc b/techlibs/common/synth.cc index 83d00f328..c837e1378 100644 --- a/techlibs/common/synth.cc +++ b/techlibs/common/synth.cc @@ -81,7 +81,7 @@ struct SynthPass : public Pass { log("\n"); log(" coarse:\n"); log(" proc\n"); - log(" opt_const\n"); + log(" opt_expr\n"); log(" opt_clean\n"); log(" check\n"); log(" opt\n"); @@ -180,7 +180,7 @@ struct SynthPass : public Pass { if (check_label(active, run_from, run_to, "coarse")) { Pass::call(design, "proc"); - Pass::call(design, "opt_const"); + Pass::call(design, "opt_expr"); Pass::call(design, "opt_clean"); Pass::call(design, "check"); Pass::call(design, "opt"); diff --git a/techlibs/common/techmap.v b/techlibs/common/techmap.v index ae08c3d17..a623bb516 100644 --- a/techlibs/common/techmap.v +++ b/techlibs/common/techmap.v @@ -93,7 +93,7 @@ module _90_shift_ops_shr_shl_sshl_sshr (A, B, Y); localparam BB_WIDTH = `MIN($clog2(shift_left ? Y_WIDTH : A_SIGNED ? WIDTH : A_WIDTH) + 1, B_WIDTH); wire [1023:0] _TECHMAP_DO_00_ = "proc;;"; - wire [1023:0] _TECHMAP_DO_01_ = "RECURSION; CONSTMAP; opt_muxtree; opt_const -mux_undef -mux_bool -fine;;;"; + wire [1023:0] _TECHMAP_DO_01_ = "RECURSION; CONSTMAP; opt_muxtree; opt_expr -mux_undef -mux_bool -fine;;;"; integer i; reg [WIDTH-1:0] buffer; @@ -136,7 +136,7 @@ module _90_shift_shiftx (A, B, Y); localparam extbit = _TECHMAP_CELLTYPE_ == "$shift" ? 1'b0 : 1'bx; wire [1023:0] _TECHMAP_DO_00_ = "proc;;"; - wire [1023:0] _TECHMAP_DO_01_ = "CONSTMAP; opt_muxtree; opt_const -mux_undef -mux_bool -fine;;;"; + wire [1023:0] _TECHMAP_DO_01_ = "CONSTMAP; opt_muxtree; opt_expr -mux_undef -mux_bool -fine;;;"; integer i; reg [WIDTH-1:0] buffer; |