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* Reduce amount of trailing whitespace in code baseLarry Doolittle2019-02-281-2/+2
* Fixed Anlogic simulation modelMiodrag Milanovic2019-01-251-1/+1
* Merge pull request #755 from Icenowy/anlogic-dram-initClifford Wolf2019-01-026-2/+96
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| * anlogic: implement DRAM initializationIcenowy Zheng2018-12-206-2/+96
* | Merge pull request #750 from Icenowy/anlogic-ff-initClifford Wolf2019-01-022-14/+15
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| * | anlogic: set the init value of DFFsIcenowy Zheng2018-12-182-14/+15
* | | Fix typographical and grammatical errors and inconsistencies.whitequark2019-01-021-1/+1
* | | anlogic: add latch cellsIcenowy Zheng2018-12-251-0/+12
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* | Merge pull request #752 from Icenowy/anlogic-lut-costClifford Wolf2018-12-191-1/+1
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| * | Anlogic: let LUT5/6 have more cost than LUT4-Icenowy Zheng2018-12-191-1/+1
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* | Merge pull request #753 from Icenowy/anlogic-makefile-fixClifford Wolf2018-12-191-0/+1
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| * | anlogic: fix Makefile.incIcenowy Zheng2018-12-191-0/+1
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* / anlogic: fix dbits of Anlogic Eagle DRAM16X4Icenowy Zheng2018-12-181-1/+1
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* anlogic: add support for Eagle Distributed RAMIcenowy Zheng2018-12-174-1/+43
* Revert "Leave only real black box cells"Icenowy Zheng2018-12-171-0/+312
* Leave only real black box cellsMiodrag Milanovic2018-12-021-312/+0
* Initial support for Anlogic FPGAMiodrag Milanovic2018-12-017-0/+1590
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