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Author
Age
Files
Lines
*
Fixed handling of inverters (aka 1-input luts) in nlutmap
Clifford Wolf
2016-03-23
1
-2
/
+2
*
Cleanup abstract modules at end of "hierarchy -top"
Clifford Wolf
2016-03-21
1
-2
/
+0
*
Support for abstract modules in chparam
Clifford Wolf
2016-03-21
1
-0
/
+6
*
Improvements in ABCEXTERNAL handling
Clifford Wolf
2016-03-19
2
-8
/
+17
*
Support calling out to an external ABC.
Sergey Kvachonok
2016-03-19
1
-4
/
+8
*
Using "mfs" and "lutpack" in ABC lut mapping
Clifford Wolf
2016-03-07
1
-5
/
+14
*
Fixed some visual studio warnings
Clifford Wolf
2016-02-13
2
-2
/
+2
*
Added "int ceil_log2(int)" function
Clifford Wolf
2016-02-13
1
-1
/
+1
*
Added "stat -liberty" for calculating chip area
Clifford Wolf
2016-02-04
1
-6
/
+60
*
Improved dffsr2dff pass
Clifford Wolf
2016-02-02
1
-5
/
+50
*
Added dffsr2dff
Clifford Wolf
2016-02-02
2
-0
/
+169
*
Use alphanumerical order instead of idstring idx in opt_clean compare_signals()
Clifford Wolf
2016-02-02
1
-1
/
+1
*
Added "abc -luts" option, Improved Xilinx logic mapping
Clifford Wolf
2016-02-01
1
-13
/
+37
*
Improvements in dfflibmap (FFs with Q/QN outputs, DFFs from ADFFs)
Clifford Wolf
2016-02-01
1
-8
/
+68
*
More clang sanitizer stuff
Clifford Wolf
2016-01-31
1
-1
/
+1
*
Added "equiv_struct -fwonly"
Clifford Wolf
2016-01-08
1
-5
/
+17
*
Bugfixes in equiv_struct
Clifford Wolf
2016-01-08
1
-2
/
+9
*
Added "submod -copy"
Clifford Wolf
2016-01-08
1
-13
/
+28
*
Added "equiv_struct -maxiter <N>"
Clifford Wolf
2016-01-06
1
-4
/
+16
*
Added "equiv_add -try" mode
Clifford Wolf
2016-01-06
1
-6
/
+33
*
Fixed "splitnets -ports" for hierarchical designs
Clifford Wolf
2015-12-22
1
-0
/
+57
*
Added %R select expression
Clifford Wolf
2015-12-20
1
-0
/
+50
*
Improved proc_mux performance for huge always blocks
Clifford Wolf
2015-12-02
1
-36
/
+153
*
Added torder command
Clifford Wolf
2015-11-19
2
-0
/
+124
*
Added "abc -g"
Clifford Wolf
2015-11-10
1
-11
/
+48
*
Fix a segfault in dffinit when the value has too few bits
Marcus Comstedt
2015-11-08
1
-1
/
+1
*
Added "singleton" pass
Clifford Wolf
2015-11-07
2
-0
/
+102
*
Bugfix in mapping $tribuf to $_TBUF_
Clifford Wolf
2015-11-05
1
-1
/
+1
*
Bugfix in memory_dff
Clifford Wolf
2015-10-31
1
-1
/
+12
*
Improvements in wreduce
Clifford Wolf
2015-10-31
1
-0
/
+25
*
Use mfp<> in equiv_mark
Clifford Wolf
2015-10-27
1
-28
/
+4
*
Improvements in equiv_struct
Clifford Wolf
2015-10-25
1
-17
/
+62
*
Major refactoring of equiv_struct
Clifford Wolf
2015-10-25
1
-93
/
+165
*
Import more std:: stuff into Yosys namespace
Clifford Wolf
2015-10-25
26
-87
/
+87
*
Added "equiv_add -cell"
Clifford Wolf
2015-10-25
1
-32
/
+93
*
equiv_struct now creates equiv_merged attributes
Clifford Wolf
2015-10-25
1
-0
/
+3
*
Improvements in equiv_struct
Clifford Wolf
2015-10-24
1
-1
/
+22
*
renamed SigSpec::to_single_sigbit() to SigSpec::as_bit(), added is_bit()
Clifford Wolf
2015-10-24
5
-19
/
+19
*
improvement in "stat"
Clifford Wolf
2015-10-24
1
-1
/
+1
*
equiv_purge bugfix, using SigChunk in Yosys namespace
Clifford Wolf
2015-10-24
4
-5
/
+6
*
Fixed handling of driver-driver conflicts in wreduce
Clifford Wolf
2015-10-24
1
-8
/
+16
*
Added equiv_mark command
Clifford Wolf
2015-10-23
3
-1
/
+265
*
Disabled "Skipping blackbox module" msg in show command
Clifford Wolf
2015-10-23
1
-1
/
+1
*
Also merge $equiv cells in equiv_struct
Clifford Wolf
2015-10-23
1
-0
/
+1
*
Improvements in equiv_struct
Clifford Wolf
2015-10-23
1
-11
/
+18
*
Added equiv_purge
Clifford Wolf
2015-10-22
2
-0
/
+210
*
Added equiv_struct command
Clifford Wolf
2015-10-21
2
-0
/
+188
*
Improved inout handling in equiv_make
Clifford Wolf
2015-10-21
1
-1
/
+1
*
Bugfixes in handling of "keep" attribute on wires
Clifford Wolf
2015-10-15
2
-2
/
+8
*
Fixed "flatten" for unconnected inout ports
Clifford Wolf
2015-10-13
1
-1
/
+1
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