iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Comment to explain separating CREG packing	Eddie Hung	2019-09-23	1	-0/+8
*	Separate out CREG packing into new pattern, to avoid conflict with PREG	Eddie Hung	2019-09-23	4	-46/+273
*	Move log_debug("\n") later	Eddie Hung	2019-09-23	1	-1/+1
*	Move unextend initialisation later	Eddie Hung	2019-09-23	1	-12/+9
*	Use new port() overload once more	Eddie Hung	2019-09-23	1	-2/+2
*	Merge remote-tracking branch 'origin/master' into xc7dsp	Eddie Hung	2019-09-23	1	-1/+7
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\| *	Revert abc9.cc	Eddie Hung	2019-09-20	1	-1/+1
\| *	Trim mismatched connection to be same (smallest) size	Eddie Hung	2019-09-20	1	-0/+6
\| *	Fix first testcase in #1391	Eddie Hung	2019-09-20	2	-2/+2
* \|	Use new port/param overload in pmg	Eddie Hung	2019-09-20	4	-22/+22
* \|	Output pattern matcher items as log_debug()	Eddie Hung	2019-09-20	2	-31/+27
* \|	OPMODE is port not param	Eddie Hung	2019-09-20	1	-7/+6
* \|	Merge remote-tracking branch 'origin/master' into xc7dsp	Eddie Hung	2019-09-20	1	-0/+18
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\| *	Add "add -mod"	Clifford Wolf	2019-09-20	1	-0/+18
* \|	Do not run xilinx_dsp_cascadeAB for now	Eddie Hung	2019-09-20	1	-1/+2
* \|	WIP for xiinx_dsp_cascadeAB	Eddie Hung	2019-09-20	1	-3/+499
* \|	Run until convergence	Eddie Hung	2019-09-20	1	-3/+9
* \|	Cleanup ice40_dsp.pmg	Eddie Hung	2019-09-20	1	-12/+6
* \|	Cleanup xilinx_dsp	Eddie Hung	2019-09-20	1	-1/+1
* \|	More exceptions	Eddie Hung	2019-09-20	1	-2/+2
* \|	Update doc	Eddie Hung	2019-09-20	1	-2/+2
* \|	Add a xilinx_dsp_cascade matcher for PCIN -> PCOUT	Eddie Hung	2019-09-20	4	-54/+105
* \|	Add an overload for port/param with default value	Eddie Hung	2019-09-20	1	-0/+8
* \|	Small cleanup	Eddie Hung	2019-09-20	1	-19/+18
* \|	Disable support for SB_MAC16 reset since it is async	Eddie Hung	2019-09-19	2	-3/+7
* \|	SB_MAC16 ffCD to not pack same as ffO	Eddie Hung	2019-09-19	1	-2/+2
* \|	Clarify	Eddie Hung	2019-09-19	1	-1/+2
* \|	Update doc for ice40_dsp	Eddie Hung	2019-09-19	1	-1/+10
* \|	Add an index	Eddie Hung	2019-09-19	2	-0/+3
* \|	Fix width of D	Eddie Hung	2019-09-19	1	-1/+1
* \|	Use ID() macro	Eddie Hung	2019-09-19	2	-210/+210
* \|	Merge remote-tracking branch 'origin/clifford/fix1381' into xc7dsp	Eddie Hung	2019-09-19	3	-5/+173
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\| *	Add techmap_autopurge attribute, fixes #1381	Clifford Wolf	2019-09-19	1	-5/+49
\| *	Added extractinv pass	Marcin Kościelnicki	2019-09-19	2	-0/+124
\| *	Document (* gentb_skip *) attr for test_autotb	Eddie Hung	2019-09-18	1	-0/+3
* \|	Re-enable sign extension for C input	Eddie Hung	2019-09-19	1	-4/+4
* \|	Do not perform width-checks for DSP48E1 which is much more complicated	Eddie Hung	2019-09-19	1	-11/+0
* \|	Remove TODO as check should not be necessary	Eddie Hung	2019-09-19	1	-1/+0
* \|	Revert index to select	Eddie Hung	2019-09-19	1	-1/+1
* \|	Cleanup xilinx_dsp too	Eddie Hung	2019-09-19	1	-37/+28
* \|	Refactor ce{mux,pol} -> hold{mux,pol}	Eddie Hung	2019-09-19	2	-77/+77
* \|	Add HOLD/RST support for SB_MAC16	Eddie Hung	2019-09-19	2	-69/+116
* \|	Add support for SB_MAC16 CD and H registers	Eddie Hung	2019-09-19	2	-13/+73
* \|	Refactor ice40_dsp.pmg	Eddie Hung	2019-09-19	2	-194/+426
* \|	Cleanup	Eddie Hung	2019-09-19	1	-8/+4
* \|	Merge remote-tracking branch 'origin/master' into xc7dsp	Eddie Hung	2019-09-18	2	-13/+18
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\| *	Merge pull request #1355 from YosysHQ/eddie/peepopt_dffmuxext	Eddie Hung	2019-09-18	3	-0/+115
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\| \| *	Revert "Make one check $shift(x)? only; change testcase to be 8b"	Eddie Hung	2019-09-13	1	-3/+2
\| \| *	Tidy up	Eddie Hung	2019-09-11	1	-10/+16
\| \| *	Fix UB	Eddie Hung	2019-09-11	1	-2/+2