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| author | Eddie Hung <eddie@fpgeh.com> | 2019-09-19 22:48:57 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-09-19 22:48:57 -0700 |
| commit | 8cfcaf108e7fd7f538ab2939032f061dc134489b (patch) | |
| tree | 0b534b49a79bd1d3b4656762b2e4ecca3faecb7f /passes | |
| parent | a59f80834f7f8ecf02ed0c608dce1a237a874d34 (diff) | |
| download | yosys-8cfcaf108e7fd7f538ab2939032f061dc134489b.tar.gz yosys-8cfcaf108e7fd7f538ab2939032f061dc134489b.tar.bz2 yosys-8cfcaf108e7fd7f538ab2939032f061dc134489b.zip | |
Disable support for SB_MAC16 reset since it is async
Diffstat (limited to 'passes')
| -rw-r--r-- | passes/pmgen/ice40_dsp.cc | 6 | ||||
| -rw-r--r-- | passes/pmgen/ice40_dsp.pmg | 4 |
2 files changed, 7 insertions, 3 deletions
diff --git a/passes/pmgen/ice40_dsp.cc b/passes/pmgen/ice40_dsp.cc index 2d264a6d1..cff4c5ddb 100644 --- a/passes/pmgen/ice40_dsp.cc +++ b/passes/pmgen/ice40_dsp.cc @@ -287,9 +287,9 @@ struct Ice40DspPass : public Pass { log("cells into iCE40 DSP resources.\n"); log("Currently, only the 16x16 multiply mode is supported and not the 2 x 8x8 mode.\n"); log("\n"); - log("Pack input registers (A, B, {C,D}; with optional hold/reset), pipeline registers\n"); - log("({F,J,K,G}, H; with shared reset), output registers (O; with optional hold/reset),\n"); - log("and post-adder into the SB_MAC16 resource.\n"); + log("Pack input registers (A, B, {C,D}; with optional hold), pipeline registers\n"); + log("({F,J,K,G}, H), output registers (O; with optional hold), and post-adder into\n"); + log("into the SB_MAC16 resource.\n"); log("\n"); log("Multiply-accumulate operations using the post-adder with feedback on the {C,D}\n"); log("input will be folded into the DSP. In this scenario only, resetting the\n"); diff --git a/passes/pmgen/ice40_dsp.pmg b/passes/pmgen/ice40_dsp.pmg index 09fd8406d..b4bfdce4a 100644 --- a/passes/pmgen/ice40_dsp.pmg +++ b/passes/pmgen/ice40_dsp.pmg @@ -384,6 +384,8 @@ code argQ argD endcode match ffrstmux + if false /* TODO: ice40 resets are actually async */ + if !argD.empty() select ffrstmux->type.in($mux) index <SigSpec> port(ffrstmux, \Y) === argD @@ -487,6 +489,8 @@ code argD argQ endcode match ffrstmux + if false /* TODO: ice40 resets are actually async */ + select ffrstmux->type.in($mux) // ffrstmux output must have two users: ffrstmux and ff.D select nusers(port(ffrstmux, \Y)) == 2 |