| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Merge pull request #1536 from YosysHQ/eddie/xilinx_dsp_muladd | Eddie Hung | 2019-11-27 | 1 | -3/+3 |
| |\ |
|
| | * | Check for either sign or zero extension for postAdd packing | Eddie Hung | 2019-11-26 | 1 | -3/+3 |
| * | | Merge pull request #1501 from YosysHQ/dave/mem_copy_attr | Clifford Wolf | 2019-11-27 | 1 | -0/+4 |
| |\ \ |
|
| | * | | memory_collect: Copy attr from RTLIL::Memory to cell | David Shah | 2019-11-18 | 1 | -0/+4 |
| * | | | opt_share: Fix handling of fine cells. | Marcin Kościelnicki | 2019-11-27 | 1 | -4/+11 |
| | |/
|/| |
|
| * | | clkbufmap: Add support for inverters in clock path. | Marcin Kościelnicki | 2019-11-25 | 1 | -0/+41 |
| * | | Add "opt_mem" pass | Clifford Wolf | 2019-11-22 | 3 | -0/+146 |
| * | | proc_dlatch: Add error handling for incorrect always_(ff|latch|comb) usage | David Shah | 2019-11-21 | 1 | -4/+16 |
| * | | Fix #1462, #1480. | Marcin Kościelnicki | 2019-11-19 | 2 | -9/+11 |
| |/ |
|
| * | Fix #1496. | Marcin Kościelnicki | 2019-11-18 | 1 | -4/+8 |
| * | Merge pull request #1492 from YosysHQ/dave/wreduce-fix-arst | Clifford Wolf | 2019-11-17 | 1 | -4/+10 |
| |\ |
|
| | * | wreduce: Don't trim zeros or sext when not matching ARST_VALUE | David Shah | 2019-11-14 | 1 | -4/+10 |
| * | | Merge pull request #1490 from YosysHQ/clifford/autoname | Clifford Wolf | 2019-11-14 | 2 | -0/+135 |
| |\ \
| |/
|/| |
|
| | * | Add "autoname" pass and use it in "synth_ice40" | Clifford Wolf | 2019-11-13 | 2 | -0/+135 |
| * | | Merge pull request #1488 from whitequark/flowmap-fixes | whitequark | 2019-11-13 | 1 | -2/+3 |
| |\ \
| |/
|/| |
|
| | * | flowmap: when doing mincut, ensure source is always in X, not X̅. | whitequark | 2019-11-12 | 1 | -1/+2 |
| | * | flowmap: don't break if that creates a k+2 (and larger) LUT either. | whitequark | 2019-11-11 | 1 | -1/+1 |
| * | | Update fsm_detect bugfix | Clifford Wolf | 2019-11-12 | 1 | -3/+4 |
| * | | Bugfix in fsm_detect | Clifford Wolf | 2019-11-12 | 1 | -6/+9 |
| |/ |
|
| * | Makefile: don't assume python is called `python3` | Sean Cross | 2019-10-19 | 1 | -2/+2 |
| * | Fix dffmux peepopt init handling | Clifford Wolf | 2019-10-16 | 2 | -27/+113 |
| * | Move GENERATE_PATTERN macro to separate utility header | Clifford Wolf | 2019-10-16 | 3 | -128/+157 |
| * | Disable left-over log_debug in peepopt_dffmux.pmg | Clifford Wolf | 2019-10-16 | 1 | -1/+1 |
| * | Revert "Be mindful that sigmap(wire) could have dupes when checking \init" | Eddie Hung | 2019-10-08 | 1 | -4/+1 |
| * | Merge pull request #1432 from YosysHQ/eddie/fix1427 | Eddie Hung | 2019-10-08 | 2 | -48/+85 |
| |\ |
|
| | * | Fix broken CI, check reset even for constants, trim rstmux | Eddie Hung | 2019-10-02 | 1 | -23/+26 |
| | * | Merge branch 'eddie/fix_sat_init' into eddie/fix1427 | Eddie Hung | 2019-10-02 | 1 | -1/+4 |
| | |\ |
|
| | | * | Be mindful that sigmap(wire) could have dupes when checking \init | Eddie Hung | 2019-10-02 | 1 | -1/+4 |
| | * | | Refactor peepopt_dffmux and be sensitive to \init when trimming | Eddie Hung | 2019-10-02 | 1 | -32/+63 |
| | |/ |
|
| * | | Merge pull request #1433 from YosysHQ/eddie/equiv_opt_async2sync | Eddie Hung | 2019-10-08 | 1 | -4/+15 |
| |\ \ |
|
| | * | | Add -async2sync to help text as per @daveshah1 | Eddie Hung | 2019-10-04 | 1 | -1/+4 |
| | * | | Restore part of doc | Eddie Hung | 2019-10-03 | 1 | -1/+2 |
| | * | | Add new -async2sync option | Eddie Hung | 2019-10-03 | 1 | -1/+11 |
| | * | | Revert "equiv_opt to call async2sync when not -multiclock like SymbiYosys" | Eddie Hung | 2019-10-03 | 1 | -2/+0 |
| | * | | Revert "Update doc for equiv_opt" | Eddie Hung | 2019-10-03 | 1 | -3/+2 |
| | |/ |
|
| * | | Merge pull request #1437 from YosysHQ/eddie/abc_to_abc9 | Eddie Hung | 2019-10-08 | 1 | -68/+67 |
| |\ \ |
|
| | * \ | Merge branch 'master' into eddie/abc_to_abc9 | Eddie Hung | 2019-10-04 | 2 | -4/+15 |
| | |\ \ |
|
| | * | | | Rename abc_* names/attributes to more precisely be abc9_* | Eddie Hung | 2019-10-04 | 1 | -65/+65 |
| * | | | | Merge pull request #1438 from YosysHQ/eddie/xilinx_dsp_comments | Eddie Hung | 2019-10-08 | 4 | -68/+356 |
| |\ \ \ \ |
|
| | * | | | | Missed this | Eddie Hung | 2019-10-05 | 1 | -3/+4 |
| | * | | | | Add comment on why we have to match for clock-enable/reset muxes | Eddie Hung | 2019-10-05 | 3 | -3/+11 |
| | * | | | | Add note on pattern detector | Eddie Hung | 2019-10-05 | 1 | -3/+7 |
| | * | | | | Add comments for xilinx_dsp_cascade | Eddie Hung | 2019-10-04 | 1 | -12/+100 |
| | * | | | | Improve comments for xilinx_dsp_CREG | Eddie Hung | 2019-10-04 | 1 | -6/+7 |
| | * | | | | Fix comment | Eddie Hung | 2019-10-04 | 1 | -1/+1 |
| | * | | | | Restore optimisation for sigM.empty() | Eddie Hung | 2019-10-04 | 1 | -1/+4 |
| | * | | | | Retry on fixing TODOs | Eddie Hung | 2019-10-04 | 2 | -13/+1 |
| | * | | | | Revert "Fix TODOs" | Eddie Hung | 2019-10-04 | 2 | -0/+20 |
| | * | | | | More comments, cleanup | Eddie Hung | 2019-10-04 | 2 | -41/+108 |
| | * | | | | Fix TODOs | Eddie Hung | 2019-10-04 | 2 | -20/+0 |
