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passes
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sat
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Author
Age
Files
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...
*
Refactoring: Renamed RTLIL::Design::modules to modules_
Clifford Wolf
2014-07-27
6
-21
/
+21
*
Refactoring: Renamed RTLIL::Module::cells to cells_
Clifford Wolf
2014-07-27
5
-14
/
+14
*
Refactoring: Renamed RTLIL::Module::wires to wires_
Clifford Wolf
2014-07-27
5
-34
/
+34
*
Changed more code to the new RTLIL::Wire constructors
Clifford Wolf
2014-07-26
1
-42
/
+13
*
Changed a lot of code to the new RTLIL::Wire constructors
Clifford Wolf
2014-07-26
1
-18
/
+5
*
More RTLIL::Cell API usage cleanups
Clifford Wolf
2014-07-26
1
-1
/
+1
*
Added RTLIL::Cell::has(portname)
Clifford Wolf
2014-07-26
1
-2
/
+2
*
Manual fixes for new cell connections API
Clifford Wolf
2014-07-26
4
-12
/
+21
*
Changed users of cell->connections_ to the new API (sed command)
Clifford Wolf
2014-07-26
5
-116
/
+116
*
Renamed RTLIL::{Module,Cell}::connections to connections_
Clifford Wolf
2014-07-26
5
-116
/
+116
*
Use only module->addCell() and module->remove() to create and delete cells
Clifford Wolf
2014-07-25
4
-65
/
+20
*
Removed RTLIL::SigSpec::optimize()
Clifford Wolf
2014-07-23
3
-13
/
+5
*
Removed RTLIL::SigSpec::expand() method
Clifford Wolf
2014-07-23
2
-10
/
+4
*
Fixed all users of SigSpec::chunks_rw() and removed it
Clifford Wolf
2014-07-23
1
-8
/
+6
*
Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 3/3
Clifford Wolf
2014-07-23
3
-8
/
+8
*
Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 2/3
Clifford Wolf
2014-07-23
3
-8
/
+8
*
Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 1/3
Clifford Wolf
2014-07-23
1
-4
/
+4
*
SigSpec refactoring: change RTLIL::SigSpec::chunks() to be read-only, created...
Clifford Wolf
2014-07-22
1
-2
/
+2
*
SigSpec refactoring: using the accessor functions everywhere
Clifford Wolf
2014-07-22
6
-84
/
+84
*
SigSpec refactoring: renamed chunks and width to __chunks and __width
Clifford Wolf
2014-07-22
6
-84
/
+84
*
Removed deprecated module->new_wire()
Clifford Wolf
2014-07-21
3
-21
/
+21
*
Wider range of cell types supported in "share" pass
Clifford Wolf
2014-07-21
1
-17
/
+197
*
Use ezSAT::non_incremental() in "share" pass
Clifford Wolf
2014-07-21
1
-0
/
+2
*
Added support for resource sharing in mux control logic
Clifford Wolf
2014-07-20
1
-86
/
+155
*
Supercell creation for $div/$mod worked all along, fixed test benches
Clifford Wolf
2014-07-20
1
-4
/
+0
*
Fixed creation of shift supercells in "share" pass
Clifford Wolf
2014-07-20
1
-4
/
+20
*
Added "miter -equiv -flatten"
Clifford Wolf
2014-07-20
1
-0
/
+14
*
Added "share" supercell creation
Clifford Wolf
2014-07-20
1
-1
/
+115
*
Added removing of always inactive cells to "share" pass
Clifford Wolf
2014-07-20
1
-8
/
+42
*
Progress in "share" pass
Clifford Wolf
2014-07-20
1
-112
/
+185
*
Progress in "share" pass
Clifford Wolf
2014-07-20
1
-19
/
+56
*
Started to implement real resource sharing
Clifford Wolf
2014-07-19
2
-0
/
+444
*
now ignore init attributes on non-register wires in sat command
Clifford Wolf
2014-07-05
1
-4
/
+24
*
added log_header to miter and expose pass, show cell type for exposed ports
Johann Glaser
2014-05-28
2
-3
/
+9
*
Small improvement in SAT log messages
Clifford Wolf
2014-03-13
1
-3
/
+3
*
Fixed bug in freduce command
Clifford Wolf
2014-03-07
1
-0
/
+30
*
Some minor code cleanups in freduce command
Clifford Wolf
2014-03-07
1
-5
/
+5
*
Added freduce -dump
Clifford Wolf
2014-03-06
1
-1
/
+24
*
Added freduce -stop
Clifford Wolf
2014-03-06
1
-3
/
+18
*
fixed freduce for Minisat::SimpSolver: use frozen_literal()
Clifford Wolf
2014-03-03
1
-2
/
+2
*
Added "sat -dump_cnf"
Clifford Wolf
2014-02-18
1
-5
/
+34
*
Coding style corrections in SatHelper::dump_model_to_vcd()
Clifford Wolf
2014-02-18
1
-31
/
+31
*
Added "sat -initsteps"
Clifford Wolf
2014-02-18
1
-14
/
+29
*
Renamed "sat -dump_fail_to_vcd" to "sat -dump_vcd" and some minor cleanups
Clifford Wolf
2014-02-17
1
-5
/
+9
*
Added "-dump_fail_to_vcd" argument to SAT solver
Andrew Zonenberg
2014-02-17
1
-0
/
+114
*
Various improvements in expose command (added -sep and -cut)
Clifford Wolf
2014-02-09
1
-36
/
+119
*
Fixed handling of async reset in expose -evert-dff
Clifford Wolf
2014-02-08
1
-0
/
+1
*
Implemented expose -evert-dff
Clifford Wolf
2014-02-08
1
-11
/
+301
*
Added generic RTLIL::SigSpec::parse_sel() with support for selection variables
Clifford Wolf
2014-02-06
2
-34
/
+17
*
Added support for sat -show @<sel_name>
Clifford Wolf
2014-02-06
1
-0
/
+17
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