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* Fixed minor typo in "sim" help messageacw12512018-09-121-1/+1
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* Consistent use of 'override' for virtual methods in derived classes.Henner Zeller2018-07-209-18/+18
| | | | | | | | | o Not all derived methods were marked 'override', but it is a great feature of C++11 that we should make use of. o While at it: touched header files got a -*- c++ -*- for emacs to provide support for that language. o use YS_OVERRIDE for all override keywords (though we should probably use the plain keyword going forward now that C++11 is established)
* Add async2sync passClifford Wolf2018-07-192-0/+148
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Removed $timescale from "sat" command VCD writerClifford Wolf2018-03-291-1/+0
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add "expose -input"Clifford Wolf2018-03-121-8/+43
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add $dlatchsr support to clk2fflogicClifford Wolf2018-02-261-4/+25
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* Fix a bug in clk2fflogic memory handlingClifford Wolf2017-12-141-1/+1
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* Add clk2fflogic memory supportClifford Wolf2017-12-141-1/+77
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* Check for memories in clk2fflogicClifford Wolf2017-12-131-0/+5
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* Rename "singleton" pass to "uniquify"Clifford Wolf2017-08-201-1/+1
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* Add "sim -zinit -rstlen"Clifford Wolf2017-08-181-1/+53
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* Add "sim" support for memoriesClifford Wolf2017-08-181-2/+136
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* Add support for assert/assume/cover to "sim" commandClifford Wolf2017-08-181-4/+47
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* Add writeback mode to "sim" commandClifford Wolf2017-08-171-0/+44
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* Improve "sim" commandClifford Wolf2017-08-171-54/+272
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* Add "sim" command skeletonClifford Wolf2017-08-162-0/+372
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* Add "setundef -anyseq"Clifford Wolf2017-05-281-1/+2
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* Bugfix in "miter -assert" handling of assumptionsClifford Wolf2016-10-171-2/+2
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* Added clk2fflogic support for $dffsr and $dlatchClifford Wolf2016-10-171-1/+57
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* Improvements and bugfixes in clk2fflogicClifford Wolf2016-10-161-13/+21
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* Some minor build fixes for Visual CClifford Wolf2016-10-141-2/+11
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* Added clk2fflogicClifford Wolf2016-10-142-0/+154
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* Added $ff and $_FF_ cell typesClifford Wolf2016-10-121-7/+31
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* Improvements in assertpmuxClifford Wolf2016-09-071-21/+158
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* Added assertpmuxClifford Wolf2016-09-072-0/+104
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* Run log_flush() before solving in sat commandClifford Wolf2016-09-061-0/+3
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* Moved SatHelper::setup_init() code to SatHelper::setup()Clifford Wolf2016-07-241-97/+92
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* Added $initstate support to "sat" commandClifford Wolf2016-07-231-13/+12
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* Added "yosys -D" featureClifford Wolf2016-04-215-6/+6
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* Improved formatting of "sat" output tablesClifford Wolf2016-04-051-5/+5
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* Renamed opt_const to opt_exprClifford Wolf2016-03-311-4/+4
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* Import more std:: stuff into Yosys namespaceClifford Wolf2015-10-253-8/+8
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* renamed SigSpec::to_single_sigbit() to SigSpec::as_bit(), added is_bit()Clifford Wolf2015-10-241-10/+10
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* Added sat -show-regs, -show-public, -show-allClifford Wolf2015-08-181-0/+39
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* Re-created command-reference-manual.tex, copied some doc fixes to online helpClifford Wolf2015-08-141-1/+1
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* Spell check (by Larry Doolittle)Clifford Wolf2015-08-145-12/+12
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* Added "miter -assert"Clifford Wolf2015-07-251-1/+93
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* Fixed trailing whitespacesClifford Wolf2015-07-025-16/+16
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* Added logic-loop error handling to freduceClifford Wolf2015-06-301-0/+11
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* don't consider blackbox modules in "sat" commandClifford Wolf2015-04-181-7/+5
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* Added non-std verilog assume() statementClifford Wolf2015-02-261-11/+29
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* Fixed "sat -initsteps" off-by-one bugClifford Wolf2015-02-221-1/+1
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* Added "sat -stepsize" and "sat -tempinduct-step"Clifford Wolf2015-02-211-21/+64
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* sat docu changeClifford Wolf2015-02-211-0/+3
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* When "sat -tempinduct-baseonly -maxsteps N" reaches maxsteps it is a good thing.Clifford Wolf2015-02-211-0/+5
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* Added "sat -tempinduct-baseonly -tempinduct-inductonly"Clifford Wolf2015-02-211-66/+92
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* Fixed basecase init for "sat -tempinduct"Clifford Wolf2015-02-211-1/+6
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* Replaced ezDefaultSAT with ezSatPtrClifford Wolf2015-02-213-73/+74
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* format fixes in "sat -dump_json"Clifford Wolf2015-02-191-18/+17
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* Added "sat -dump_json" (WaveJSON format)Clifford Wolf2015-02-191-4/+92
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