| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | More use of IdString::in() | Eddie Hung | 2019-08-15 | 1 | -26/+25 |
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| * | Add YOSYS_NO_IDS_REFCNT configuration macro | Clifford Wolf | 2019-08-11 | 2 | -2/+25 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Use ID() in kernel/*, add simple ID:: hack (to be improved upon later) | Clifford Wolf | 2019-08-11 | 10 | -1160/+1182 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | More improvements and cleanups in IdString subsystem | Clifford Wolf | 2019-08-11 | 3 | -43/+54 |
| | | | | | | | | | | - better use of "inline" keyword - deprecate "sticky" IDs feature - improve handling of empty ID - add move constructor Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Improve API of ID() macro | Clifford Wolf | 2019-08-11 | 1 | -2/+10 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Merge pull request #1258 from YosysHQ/eddie/cleanup | Clifford Wolf | 2019-08-10 | 8 | -86/+90 |
| |\ | | | | | Cleanup a few barnacles across codebase | ||||
| | * | substr() -> compare() | Eddie Hung | 2019-08-07 | 2 | -32/+32 |
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| | * | RTLIL::S{0,1} -> State::S{0,1} for headers | Eddie Hung | 2019-08-07 | 5 | -40/+40 |
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| | * | RTLIL::S{0,1} -> State::S{0,1} | Eddie Hung | 2019-08-07 | 1 | -6/+6 |
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| | * | Merge remote-tracking branch 'origin/master' into eddie/cleanup | Eddie Hung | 2019-08-07 | 5 | -80/+96 |
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| | * | | stoi -> atoi | Eddie Hung | 2019-08-07 | 1 | -3/+3 |
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| | * | | Fix typos | Eddie Hung | 2019-08-06 | 2 | -4/+4 |
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| | * | | Use std::stoi instead of atoi(<str>.c_str()) | Eddie Hung | 2019-08-06 | 1 | -3/+3 |
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| | * | | Use IdString::begins_with() | Eddie Hung | 2019-08-06 | 2 | -7/+11 |
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| | * | | Make liberal use of IdString.in() | Eddie Hung | 2019-08-06 | 1 | -1/+1 |
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| * | | | Automatically prune init attributes in verific front-end, fixes #1237 | Clifford Wolf | 2019-08-07 | 1 | -5/+14 |
| | |/ |/| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | Merge pull request #1213 from YosysHQ/eddie/wreduce_add | Clifford Wolf | 2019-08-07 | 1 | -0/+2 |
| |\ \ | | | | | | | wreduce/opt_expr: improve width reduction for $add and $sub cells | ||||
| | * | | Add SigSpec::extract_end() convenience function | Eddie Hung | 2019-08-06 | 1 | -0/+1 |
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| | * | | Restore original SigSpec::extract() | Eddie Hung | 2019-08-06 | 1 | -1/+1 |
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| | * | | Merge remote-tracking branch 'origin/master' into eddie/wreduce_add | Eddie Hung | 2019-08-06 | 10 | -28/+184 |
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| | * | | Add an SigSpec::at(offset, defval) convenience method | Eddie Hung | 2019-07-19 | 1 | -0/+1 |
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| | * | | SigSpec::extract to take negative lengths | Eddie Hung | 2019-07-19 | 1 | -1/+1 |
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| * | | | Merge pull request #1253 from YosysHQ/clifford/check | Clifford Wolf | 2019-08-07 | 3 | -9/+17 |
| |\ \ \ | | | | | | | | | Be less aggressive with running design->check() | ||||
| | * | | | Be less aggressive with running design->check() | Clifford Wolf | 2019-08-06 | 3 | -9/+17 |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | | | Tweak default gate costs, cleanup "stat -tech cmos" | Clifford Wolf | 2019-08-07 | 1 | -4/+4 |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | | | Redesign of cell cost API | Clifford Wolf | 2019-08-07 | 1 | -71/+77 |
| | |_|/ |/| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | | Add support for writing gzip-compressed files | David Shah | 2019-08-06 | 1 | -7/+60 |
| |/ / | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
| * | | Add $_NMUX_, add "abc -g cmos", add proper cmos cell costs | Clifford Wolf | 2019-08-06 | 7 | -9/+46 |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | New mxe hacks needed to support 2ca237e | Miodrag Milanovic | 2019-08-01 | 1 | -0/+4 |
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| * | | Fix case when file does not exist | Miodrag Milanovic | 2019-07-29 | 1 | -19/+21 |
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| * | | Merge pull request #1226 from YosysHQ/dave/gzip | David Shah | 2019-07-27 | 2 | -9/+52 |
| |\ \ | | | | | | | Add support for gzip'd input files | ||||
| | * | | Fix frontend auto-detection for gzipped input | David Shah | 2019-07-26 | 1 | -9/+12 |
| | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
| | * | | Add support for reading gzip'd input files | David Shah | 2019-07-26 | 1 | -0/+40 |
| | |/ | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
| * | | replaced std::iterator with using statements | Jakob Wenzel | 2019-07-25 | 1 | -6/+6 |
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| * | | made ObjectIterator extend std::iterator | Jakob Wenzel | 2019-07-24 | 2 | -2/+19 |
| |/ | | | | this makes it possible to use std algorithms on them | ||||
| * | Revert "Add log_checkpoint function and use it in opt_muxtree" | Eddie Hung | 2019-07-15 | 2 | -8/+0 |
| | | | | | This reverts commit 0e6c83027f24cdf7082606a5631468ad28f41574. | ||||
| * | Redesign log_id_cache so that it doesn't keep IdString instances referenced, ↵ | Clifford Wolf | 2019-07-15 | 1 | -6/+13 |
| | | | | | | | fixes #1178 Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Add log_checkpoint function and use it in opt_muxtree | Clifford Wolf | 2019-07-15 | 2 | -0/+8 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Merge pull request #1162 from whitequark/rtlil-case-attrs | Clifford Wolf | 2019-07-09 | 1 | -1/+1 |
| |\ | | | | | Allow attributes on individual switch cases in RTLIL | ||||
| | * | Allow attributes on individual switch cases in RTLIL. | whitequark | 2019-07-08 | 1 | -1/+1 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The parser changes are slightly awkward. Consider the following IL: process $0 <point 1> switch \foo <point 2> case 1'1 assign \bar \baz <point 3> ... case end end Before this commit, attributes are valid in <point 1>, and <point 3> iff it is immediately followed by a `switch`. (They are essentially attached to the switch.) But, after this commit, and because switch cases do not have an ending delimiter, <point 3> becomes ambiguous: the attribute could attach to either the following `case`, or to the following `switch`. This isn't expressible in LALR(1) and results in a reduce/reduce conflict. To address this, attributes inside processes are now valid anywhere inside the process: in <point 1> and <point 3> a part of case body, and in <point 2> as a separate rule. As a consequence, attributes can now precede `assign`s, which is made illegal in the same way it is illegal to attach attributes to `connect`. Attributes are tracked separately from the parser state, so this does not affect collection of attributes at all, other than allowing them on `case`s. The grammar change serves purely to allow attributes in more syntactic places. | ||||
| * | | Clarify script -scriptwire doc | Eddie Hung | 2019-07-08 | 1 | -0/+4 |
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| * | Use Pass::call_on_module() as per @cliffordwolf comments | Eddie Hung | 2019-07-02 | 1 | -1/+1 |
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| * | script -select -> script -scriptwire | Eddie Hung | 2019-07-02 | 1 | -5/+5 |
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| * | Support ability for "script -select" to take commands from wires | Eddie Hung | 2019-06-28 | 1 | -8/+39 |
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| * | Merge pull request #1098 from YosysHQ/xaig | Eddie Hung | 2019-06-28 | 1 | -0/+12 |
| |\ | | | | | "abc9" pass for timing-aware techmapping (experimental, FPGA only, no FFs) | ||||
| | * | Undo iterator based Module::remove() for cells, as containers will not | Eddie Hung | 2019-06-27 | 2 | -11/+2 |
| | | | | | | | | | invalidate | ||||
| | * | Merge remote-tracking branch 'origin/master' into xaig | Eddie Hung | 2019-06-21 | 1 | -0/+1 |
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| | * \ | Merge remote-tracking branch 'origin/master' into xaig | Eddie Hung | 2019-06-20 | 2 | -1/+32 |
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| | * | | | Fix leak removing cells during ABC integration; also preserve attr | Eddie Hung | 2019-06-17 | 2 | -2/+11 |
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| | * | | | Further cleanup based on @daveshah1 | Eddie Hung | 2019-06-14 | 1 | -0/+6 |
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