Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | Add $_NMUX_, add "abc -g cmos", add proper cmos cell costs | Clifford Wolf | 2019-08-06 | 7 | -9/+46 |
* | New mxe hacks needed to support 2ca237e | Miodrag Milanovic | 2019-08-01 | 1 | -0/+4 |
* | Fix case when file does not exist | Miodrag Milanovic | 2019-07-29 | 1 | -19/+21 |
* | Merge pull request #1226 from YosysHQ/dave/gzip | David Shah | 2019-07-27 | 2 | -9/+52 |
|\ | |||||
| * | Fix frontend auto-detection for gzipped input | David Shah | 2019-07-26 | 1 | -9/+12 |
| * | Add support for reading gzip'd input files | David Shah | 2019-07-26 | 1 | -0/+40 |
* | | replaced std::iterator with using statements | Jakob Wenzel | 2019-07-25 | 1 | -6/+6 |
* | | made ObjectIterator extend std::iterator | Jakob Wenzel | 2019-07-24 | 2 | -2/+19 |
|/ | |||||
* | Revert "Add log_checkpoint function and use it in opt_muxtree" | Eddie Hung | 2019-07-15 | 2 | -8/+0 |
* | Redesign log_id_cache so that it doesn't keep IdString instances referenced, ... | Clifford Wolf | 2019-07-15 | 1 | -6/+13 |
* | Add log_checkpoint function and use it in opt_muxtree | Clifford Wolf | 2019-07-15 | 2 | -0/+8 |
* | Merge pull request #1162 from whitequark/rtlil-case-attrs | Clifford Wolf | 2019-07-09 | 1 | -1/+1 |
|\ | |||||
| * | Allow attributes on individual switch cases in RTLIL. | whitequark | 2019-07-08 | 1 | -1/+1 |
* | | Clarify script -scriptwire doc | Eddie Hung | 2019-07-08 | 1 | -0/+4 |
|/ | |||||
* | Use Pass::call_on_module() as per @cliffordwolf comments | Eddie Hung | 2019-07-02 | 1 | -1/+1 |
* | script -select -> script -scriptwire | Eddie Hung | 2019-07-02 | 1 | -5/+5 |
* | Support ability for "script -select" to take commands from wires | Eddie Hung | 2019-06-28 | 1 | -8/+39 |
* | Merge pull request #1098 from YosysHQ/xaig | Eddie Hung | 2019-06-28 | 1 | -0/+12 |
|\ | |||||
| * | Undo iterator based Module::remove() for cells, as containers will not | Eddie Hung | 2019-06-27 | 2 | -11/+2 |
| * | Merge remote-tracking branch 'origin/master' into xaig | Eddie Hung | 2019-06-21 | 1 | -0/+1 |
| |\ | |||||
| * \ | Merge remote-tracking branch 'origin/master' into xaig | Eddie Hung | 2019-06-20 | 2 | -1/+32 |
| |\ \ | |||||
| * | | | Fix leak removing cells during ABC integration; also preserve attr | Eddie Hung | 2019-06-17 | 2 | -2/+11 |
| * | | | Further cleanup based on @daveshah1 | Eddie Hung | 2019-06-14 | 1 | -0/+6 |
| * | | | Move ConstEvalAig to aigerparse.cc | Eddie Hung | 2019-06-13 | 1 | -157/+0 |
| * | | | More slimming | Eddie Hung | 2019-06-13 | 1 | -35/+35 |
| * | | | Add ConstEvalAig specialised for AIGs | Eddie Hung | 2019-06-13 | 1 | -0/+157 |
| * | | | Merge remote-tracking branch 'origin/master' into xaig | Eddie Hung | 2019-06-12 | 9 | -21/+187 |
| |\ \ \ | |||||
| * | | | | Remove kernel/cost.cc since master has refactored it | Eddie Hung | 2019-04-22 | 1 | -75/+0 |
| * | | | | Merge remote-tracking branch 'origin/master' into xaig | Eddie Hung | 2019-04-22 | 9 | -5/+289 |
| |\ \ \ \ | |||||
| * \ \ \ \ | Merge remote-tracking branch 'origin/master' into xaig | Eddie Hung | 2019-04-20 | 2 | -3/+6 |
| |\ \ \ \ \ | |||||
| * | | | | | | Ignore 'whitebox' attr in flatten with "-wb" option | Eddie Hung | 2019-04-18 | 1 | -2/+2 |
| * | | | | | | Merge remote-tracking branch 'origin/clifford/whitebox' into xaig | Eddie Hung | 2019-04-18 | 2 | -3/+7 |
| |\ \ \ \ \ \ | |||||
| * \ \ \ \ \ \ | Merge branch 'master' into xaig | Eddie Hung | 2019-04-08 | 7 | -27/+151 |
| |\ \ \ \ \ \ \ | |||||
| * \ \ \ \ \ \ \ | Merge remote-tracking branch 'origin/master' into xaig | Eddie Hung | 2019-02-26 | 1 | -2/+16 |
| |\ \ \ \ \ \ \ \ | |||||
| * | | | | | | | | | Add IdString::ends_with() | Eddie Hung | 2019-02-26 | 1 | -0/+6 |
| * | | | | | | | | | Merge remote-tracking branch 'origin/master' into xaig | Eddie Hung | 2019-02-21 | 1 | -0/+3 |
| |\ \ \ \ \ \ \ \ \ | |||||
| * | | | | | | | | | | Refactor kernel/cost.h definition into cost.cc | Eddie Hung | 2019-02-08 | 2 | -49/+77 |
* | | | | | | | | | | | Merge remote-tracking branch 'upstream/master' | Bogdan Vukobratovic | 2019-06-27 | 1 | -0/+1 |
|\ \ \ \ \ \ \ \ \ \ \ | | |_|_|_|_|_|_|_|_|/ | |/| | | | | | | | | | |||||
| * | | | | | | | | | | Add a few more filename rewrites | Ben Widawsky | 2019-06-20 | 1 | -0/+1 |
| | |_|_|_|_|_|_|_|/ | |/| | | | | | | | | |||||
* | | | | | | | | | | Merge branch 'master' of https://github.com/bogdanvuk/yosys into clifford/ext... | Clifford Wolf | 2019-06-20 | 1 | -5/+4 |
|\ \ \ \ \ \ \ \ \ \ | |/ / / / / / / / / |/| | | | | | | | | | |||||
| * | | | | | | | | | Move netlist helper module to passes/opt for the time being | Bogdan Vukobratovic | 2019-06-14 | 1 | -317/+0 |
| * | | | | | | | | | Merge remote-tracking branch 'upstream/master' | Bogdan Vukobratovic | 2019-06-14 | 3 | -1/+14 |
| |\ \ \ \ \ \ \ \ \ | | | |_|_|_|_|_|_|/ | | |/| | | | | | | | |||||
| * | | | | | | | | | Prepare for situation when port of the signal cannot be found | Bogdan Vukobratovic | 2019-06-14 | 1 | -1/+7 |
| * | | | | | | | | | Implement disconnection of constant register bits | Bogdan Vukobratovic | 2019-06-13 | 1 | -32/+85 |
| * | | | | | | | | | Pass SigBit by value to Netlist algorithms | Bogdan Vukobratovic | 2019-06-13 | 1 | -65/+84 |
| * | | | | | | | | | Rename satgen_algo.h -> algo.h, code cleanup and refactoring | Bogdan Vukobratovic | 2019-06-12 | 3 | -206/+243 |
| * | | | | | | | | | Generate satgen instance instead of calling sat pass | Bogdan Vukobratovic | 2019-06-11 | 1 | -1/+44 |
| * | | | | | | | | | Refactor driver map generation | Bogdan Vukobratovic | 2019-06-10 | 1 | -0/+158 |
* | | | | | | | | | | Merge pull request #1100 from bwidawsk/home | Clifford Wolf | 2019-06-19 | 1 | -0/+4 |
|\ \ \ \ \ \ \ \ \ \ | |||||
| * | | | | | | | | | | Support ~ for home directory | Ben Widawsky | 2019-06-18 | 1 | -0/+4 |
| | |/ / / / / / / / | |/| | | | | | | | |