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* kernel: make IdString::isPublic() const.whitequark2020-12-121-1/+1
* add IdString::isPublic()N. Engelhardt2020-09-031-0/+2
* Add add* functions for the new FF typesMarcelina Kościelnicka2020-06-231-0/+20
* Merge pull request #2177 from boqwxp/dict-iterator-jumpwhitequark2020-06-211-0/+23
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| * hashlib, rtlil: Add `operator+=()` to `dict<>::iterator` and `dict<>::const_i...Alberto Gonzalez2020-06-191-0/+23
* | rtlil: Add `Design::select()` for selecting whole modules.Alberto Gonzalez2020-06-191-0/+7
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* RTLIL: add Module::addProcess, use it in Module::cloneInto. NFC.whitequark2020-06-091-0/+2
* flatten: preserve original object names via hdlname attribute.whitequark2020-06-081-0/+3
* Merge pull request #2105 from whitequark/split-flatten-off-techmapclairexen2020-06-081-0/+2
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| * RTLIL: factor out RTLIL::Module::addMemory. NFC.whitequark2020-06-041-0/+2
* | Merge pull request #2006 from jersey99/signed-in-rtlil-wirewhitequark2020-06-041-1/+1
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| * | Preserve 'signed'-ness of a verilog wire through RTLILVamsi K Vytla2020-04-271-1/+1
* | | Merge pull request #2070 from hackfin/masterN. Engelhardt2020-06-041-6/+3
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| * | idict handling in wrapperMartin2020-05-191-6/+3
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* | Merge pull request #1885 from Xiretza/mod-rem-cellsclairexen2020-05-291-0/+10
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| * | Add comments for mod/div semantics to rtlil.hXiretza2020-05-281-0/+4
| * | Add flooring division operatorXiretza2020-05-281-0/+3
| * | Add flooring modulo operatorXiretza2020-05-281-0/+3
* | | Merge pull request #2092 from whitequark/rtlil-no-space-controlclairexen2020-05-291-3/+5
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| * | Restrict RTLIL::IdString to not contain whitespace or control chars.whitequark2020-05-291-3/+5
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* | Merge pull request #2088 from rswarbrick/count-atwhitequark2020-05-281-2/+8
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| * | Minor optimisation in Module::wire() and Module::cell()Rupert Swarbrick2020-05-261-2/+8
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* | Merge pull request #2086 from rswarbrick/sigbitwhitequark2020-05-281-2/+1
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| * | Use default copy constructor for RTLIL::SigBitRupert Swarbrick2020-05-261-2/+1
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* / Use c_str(), not str() for IdString/std::string == and != operatorsRupert Swarbrick2020-05-261-2/+2
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* ilang, ast: Store parameter order and default value information.Marcelina Kościelnicka2020-04-211-1/+2
* rtlil: add AttrObject::has_attribute.whitequark2020-04-161-0/+2
* rtlil: add AttrObject::{get,set}_string_attribute.whitequark2020-04-161-2/+9
* Merge pull request #1858 from YosysHQ/eddie/fix1856Eddie Hung2020-04-091-1/+1
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| * kernel: include "kernel/constids.inc" instead of "constids.inc"Eddie Hung2020-04-091-1/+1
* | [NFCI] Deduplicate builtin FF cell types listMarcelina Kościelnicka2020-04-091-0/+2
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* kernel: IdString::in(const IdString &) as per @TjoppenEddie Hung2020-04-021-1/+1
* kernel: fix formatting (thanks @boqwxp)Eddie Hung2020-04-021-6/+4
* kernel: use C++11 fold hack to prevent recursionEddie Hung2020-04-021-3/+8
* Revert "kernel: IdString:in() to use perfect forwarding"Eddie Hung2020-04-021-2/+2
* kernel: separate IdString::put_reference() out to help inliningEddie Hung2020-04-021-1/+4
* kernel: IdString:in() to use perfect forwardingEddie Hung2020-04-021-2/+2
* kernel: Use constids.inc for global/constant IdStringsEddie Hung2020-04-021-5/+3
* Merge pull request #1845 from YosysHQ/eddie/kernel_speedupEddie Hung2020-04-021-181/+191
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| * kernel: pass-by-value into Design::scratchpad_set_string() tooEddie Hung2020-03-271-1/+1
| * kernel: Cell::set{Port,Param}() to pass by value, but use std::moveEddie Hung2020-03-261-2/+2
| * kernel: SigSpec copies to not trigger pack()Eddie Hung2020-03-181-1/+1
| * kernel: more pass by const ref, more speedupsEddie Hung2020-03-181-180/+180
| * kernel: SigSpec use more const& + overloads to prevent implicit SigSpecEddie Hung2020-03-131-7/+13
| * kernel: optimise Module::remove(const pool<RTLIL::Wire*>()Eddie Hung2020-03-121-0/+4
* | Add support for SystemVerilog-style `define to Verilog frontendRupert Swarbrick2020-03-271-1/+4
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* Add and use SigSpec::reverse()Eddie Hung2020-01-281-0/+2
* Add RTLIL::constpad, init by yosys_setup(); use for abc9Eddie Hung2020-01-081-0/+2
* Add Const::{begin,end,empty}()Eddie Hung2019-10-041-0/+3
* Add YOSYS_NO_IDS_REFCNT configuration macroClifford Wolf2019-08-111-1/+22