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* Merge pull request #1718 from boqwxp/precise_locationsClaire Wolf2020-03-034-267/+253
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| * Closes #1717. Add more precise Verilog source location information to AST and...Alberto Gonzalez2020-02-234-267/+253
* | Merge pull request #1681 from YosysHQ/eddie/fix1663Claire Wolf2020-03-031-15/+13
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| * | verilog: instead of modifying localparam size, extend init constant exprEddie Hung2020-02-051-15/+13
* | | Merge pull request #1724 from YosysHQ/eddie/abc9_specifyEddie Hung2020-03-022-12/+20
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| * | | ast: quiet down when deriving blackbox modulesEddie Hung2020-02-272-12/+20
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* | | ast: fixes #1710; do not generate RTLIL for unreachable ternaryEddie Hung2020-02-271-9/+22
* | | Comment out log()Eddie Hung2020-02-271-1/+1
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* | Merge pull request #1703 from YosysHQ/eddie/specify_improveEddie Hung2020-02-211-7/+11
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| * | verilog: fix $specify3 checkEddie Hung2020-02-131-7/+11
* | | Merge pull request #1642 from jjj11x/jjj11x/sv-enumClaire Wolf2020-02-204-16/+221
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| * | remove unnecessary blank lineJeff Wang2020-02-171-2/+1
| * | add attributes for enumerated values in ilangJeff Wang2020-02-172-1/+68
| * | separate out enum_item/param implementation when they should be differentJeff Wang2020-02-171-7/+16
| * | fix bug introduced by not taking all of PeterCrozier's changes in 16ea4ea6Jeff Wang2020-01-171-4/+6
| * | fix enum in generate blocksJeff Wang2020-01-161-0/+20
| * | allow enums to be declared at toplevel scopeJeff Wang2020-01-161-0/+7
| * | partial rebase of PeterCrozier's enum work onto current masterJeff Wang2020-01-164-16/+117
* | | Modified $readmem[hb] to use '\' or '/' according the OSRodrigo Alejandro Melo2020-02-061-1/+6
* | | Merge branch 'master' of https://github.com/YosysHQ/yosysRodrigo Alejandro Melo2020-02-032-93/+110
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| * | ast: Add support for $sformatf system functionDavid Shah2020-01-192-93/+110
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* | Replaced strlen by GetSize into simplify.ccRodrigo Alejandro Melo2020-02-031-2/+2
* | Fixed a bug in the new feature of $readmem[hb] when an empty string is providedRodrigo Alejandro Melo2020-02-011-1/+1
* | Modified the new search for files of $readmem[hb] to be backward compatibleRodrigo Alejandro Melo2020-01-311-3/+7
* | $readmem[hb] file inclusion is now relative to the Verilog fileRodrigo Alejandro Melo2020-01-311-1/+2
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* Stray log_dumpEddie Hung2019-12-111-1/+0
* Preserve size of $genval$-s in for loopsEddie Hung2019-12-111-0/+17
* Use "(id)" instead of "id" for types as temporary hackClifford Wolf2019-10-144-9/+118
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| * frontends/ast: code styleDavid Shah2019-10-031-2/+1
| * sv: Fix typedefs in blocksDavid Shah2019-10-031-2/+2
| * sv: Add support for memories of a typedefDavid Shah2019-10-031-6/+20
| * sv: Add support for memory typedefsDavid Shah2019-10-031-2/+15
| * sv: Fix typedefs in packagesDavid Shah2019-10-031-4/+10
| * sv: Fix typedef parametersDavid Shah2019-10-031-2/+31
| * sv: Switch parser to glr, prep for typedefDavid Shah2019-10-034-7/+55
* | Fix for svinterfacesEddie Hung2019-09-301-2/+8
* | module->derive() to be lazy and not touch ast if already derivedEddie Hung2019-09-302-33/+51
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* Fix handling of read_verilog config in AstModule::reprocess_module(), fixes #...Clifford Wolf2019-09-202-18/+30
* Fix handling of range selects on loop variables, fixes #1372Clifford Wolf2019-09-161-2/+9
* Merge pull request #1350 from YosysHQ/clifford/fixsby59Clifford Wolf2019-09-051-7/+18
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| * Properly construct $live and $fair cells from "if (...) assume/assert (s_even...Clifford Wolf2019-09-021-7/+18
* | Remove newlineEddie Hung2019-08-291-1/+0
* | Restore non-deferred code, deferred case to ignore non constant attrEddie Hung2019-08-291-5/+12
* | read_verilog -defer should still populate module attributesEddie Hung2019-08-281-5/+6
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* Do not propagate mem2reg attribute through to resultEddie Hung2019-08-221-1/+2
* mem2reg to preserve user attributes and srcEddie Hung2019-08-211-0/+4
* handle real values when deriving ast modulesJakob Wenzel2019-08-191-1/+4
* Revert "Merge pull request #1280 from YosysHQ/revert-1266-eddie/ice40_full_ad...Eddie Hung2019-08-121-1/+1
* Revert "Wrap SB_LUT+SB_CARRY into $__ICE40_CARRY_WRAPPER"David Shah2019-08-101-1/+1
* Merge pull request #1258 from YosysHQ/eddie/cleanupClifford Wolf2019-08-103-14/+14
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