| Commit message (Expand) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| | | * | | | | | Add #1460 testcase | Eddie Hung | 2019-12-12 | 1 | -0/+34 | |
| | | * | | | | | Add memory rules for RAM16X1D, RAM32M, RAM64M | Eddie Hung | 2019-12-12 | 2 | -0/+168 | |
| | | * | | | | | Rename memory tests to lutram, add more xilinx tests | Eddie Hung | 2019-12-12 | 9 | -53/+156 | |
| | * | | | | | | Merge pull request #1521 from dh73/diego/memattr | Eddie Hung | 2019-12-16 | 7 | -48/+374 | |
| | |\ \ \ \ \ \ | ||||||
| | | * | | | | | | Enforce non-existence | Eddie Hung | 2019-12-16 | 1 | -0/+4 | |
| | | * | | | | | | Update doc | Eddie Hung | 2019-12-16 | 1 | -4/+6 | |
| | | * | | | | | | Add another test | Eddie Hung | 2019-12-16 | 1 | -1/+8 | |
| | | * | | | | | | More sloppiness, thanks @dh73 for spotting | Eddie Hung | 2019-12-16 | 1 | -4/+4 | |
| | | * | | | | | | Accidentally commented out tests | Eddie Hung | 2019-12-16 | 1 | -47/+47 | |
| | | * | | | | | | Add unconditional match blocks for force RAM | Eddie Hung | 2019-12-16 | 2 | -4/+45 | |
| | | * | | | | | | Oops | Eddie Hung | 2019-12-16 | 1 | -4/+1 | |
| | | * | | | | | | Merge blockram tests | Eddie Hung | 2019-12-16 | 3 | -47/+81 | |
| | | * | | | | | | Update xc7/xcu bram rules | Eddie Hung | 2019-12-16 | 1 | -8/+4 | |
| | | * | | | | | | Implement 'attributes' grammar | Eddie Hung | 2019-12-16 | 1 | -80/+88 | |
| | | * | | | | | | Merge branch 'diego/memattr' of https://github.com/dh73/yosys into diego/memattr | Eddie Hung | 2019-12-16 | 4 | -1/+238 | |
| | |/| | | | | | | ||||||
| | | * | | | | | | Fixing compiler warning/issues. Moving test script to the correct place | Diego H | 2019-12-16 | 2 | -14/+14 | |
| | | * | | | | | | Removing fixed attribute value to !ramstyle rules | Diego H | 2019-12-15 | 2 | -3242/+4 | |
| | | * | | | | | | Merging attribute rules into a single match block; Adding tests | Diego H | 2019-12-15 | 5 | -86/+3465 | |
| | | * | | | | | | Refactoring memory attribute matching based on IEEE 1364.1 and Tool specific | Diego H | 2019-12-13 | 2 | -0/+96 | |
| | * | | | | | | | Merge pull request #1575 from rodrigomelo9/master | Eddie Hung | 2019-12-15 | 3 | -4/+4 | |
| | |\ \ \ \ \ \ \ | ||||||
| | | * | | | | | | | Fixed some missing "verilog_" in documentation | Rodrigo Alejandro Melo | 2019-12-13 | 3 | -4/+4 | |
| | | | |/ / / / / | | |/| | | | | | ||||||
| | * | | | | | | | Merge pull request #1577 from gromero/for-yosys | Eddie Hung | 2019-12-15 | 1 | -1/+1 | |
| | |\ \ \ \ \ \ \ | ||||||
| | | * | | | | | | | manual: Fix text in Abstract section | Gustavo Romero | 2019-12-11 | 1 | -1/+1 | |
| | * | | | | | | | | Merge pull request #1578 from noopwafel/eqneq-debug | Eddie Hung | 2019-12-15 | 1 | -1/+1 | |
| | |\ \ \ \ \ \ \ \ | | |_|_|/ / / / / | |/| | | | | | | | ||||||
| | | * | | | | | | | Fix opt_expr.eqneq.cmpzero debug print | Alyssa Milburn | 2019-12-15 | 1 | -1/+1 | |
| | |/ / / / / / / | ||||||
| | * | | | | | | | Merge pull request #1533 from dh73/bram_xilinx | Eddie Hung | 2019-12-13 | 3 | -6/+101 | |
| | |\ \ \ \ \ \ \ | | |_|/ / / / / | |/| | | | | | | ||||||
| | | * | | | | | | Renaming BRAM memory tests for the sake of uniformity | Diego H | 2019-12-13 | 2 | -6/+6 | |
| | | * | | | | | | Fixing citation in xc7_xcu_brams.txt file. Fixing RAMB36E1 test. | Diego H | 2019-12-12 | 2 | -7/+7 | |
| | | * | | | | | | Adding a note (TODO) in the memory_params.ys check file | Diego H | 2019-12-12 | 1 | -0/+2 | |
| | | * | | | | | | Updating RAMB36E1 thresholds. Adding test for both RAMB18E1/RAMB36E1 | Diego H | 2019-12-12 | 3 | -2/+92 | |
| | | * | | | | | | Merge https://github.com/YosysHQ/yosys into bram_xilinx | Diego H | 2019-12-12 | 43 | -1053/+2108 | |
| | | |\ \ \ \ \ \ | | | | |/ / / / | | | |/| | | | | ||||||
| | | * | | | | | | Adjusting Vivado's BRAM min bits threshold for RAMB18E1 | Diego H | 2019-11-27 | 1 | -2/+5 | |
| * | | | | | | | | Bump ABC again | Eddie Hung | 2019-12-18 | 1 | -1/+1 | |
| * | | | | | | | | Remove &verify -s | Eddie Hung | 2019-12-17 | 1 | -1/+1 | |
| * | | | | | | | | Bump ABC for upstream fix | Eddie Hung | 2019-12-17 | 1 | -1/+1 | |
| * | | | | | | | | Use pool<> instead of std::set<> to preserver ordering | Eddie Hung | 2019-12-17 | 1 | -6/+6 | |
| * | | | | | | | | aiger frontend to user shorter, $-prefixed, names | Eddie Hung | 2019-12-17 | 1 | -14/+14 | |
| * | | | | | | | | Cleanup xaiger, remove unnecessary complexity with inout | Eddie Hung | 2019-12-17 | 2 | -84/+24 | |
| * | | | | | | | | read_xaiger to cope with optional '\n' after 'c' | Eddie Hung | 2019-12-17 | 1 | -2/+2 | |
| * | | | | | | | | Do not sigmap | Eddie Hung | 2019-12-17 | 1 | -1/+1 | |
| * | | | | | | | | Revert "Use sigmap signal" | Eddie Hung | 2019-12-17 | 1 | -1/+1 | |
| * | | | | | | | | abc9 needs a clean afterwards | Eddie Hung | 2019-12-16 | 1 | -2/+4 | |
| * | | | | | | | | Put $__ABC9_{FF_,ASYNC} into same clock domain as abc9_flop | Eddie Hung | 2019-12-16 | 1 | -5/+27 | |
| * | | | | | | | | Use sigmap signal | Eddie Hung | 2019-12-16 | 1 | -1/+1 | |
| * | | | | | | | | Skip $inout transformation if not a PI | Eddie Hung | 2019-12-16 | 1 | -3/+5 | |
| * | | | | | | | | Revert "write_xaiger: use sigmap bits more consistently" | Eddie Hung | 2019-12-16 | 1 | -4/+5 | |
| * | | | | | | | | write_xaiger: use sigmap bits more consistently | Eddie Hung | 2019-12-16 | 1 | -5/+4 | |
| * | | | | | | | | Name inputs/outputs of aiger 'i%d' and 'o%d' | Eddie Hung | 2019-12-13 | 1 | -13/+6 | |
| * | | | | | | | | Remove 'clkpart' entry in CHANGELOG | Eddie Hung | 2019-12-12 | 1 | -1/+0 | |
| * | | | | | | | | Merge remote-tracking branch 'origin/master' into xaig_dff | Eddie Hung | 2019-12-12 | 18 | -64/+238 | |
| |\| | | | | | | | ||||||
 |
index : iCE40/yosys | |
| [no description] |
| aboutsummaryrefslogtreecommitdiffstats |