| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Add ConstEvalAig specialised for AIGs | Eddie Hung | 2019-06-13 | 2 | -3/+159 |
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| * | Update CHANGELOG with "synth -abc9" | Eddie Hung | 2019-06-13 | 1 | -0/+1 |
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| * | Fix LP SB_LUT4 timing | Eddie Hung | 2019-06-13 | 1 | -1/+1 |
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| * | More accurate CHANGELOG | Eddie Hung | 2019-06-13 | 1 | -1/+3 |
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| * | Update CHANGELOG | Eddie Hung | 2019-06-12 | 1 | -0/+1 |
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| * | Rip out all non FPGA stuff from abc9 | Eddie Hung | 2019-06-12 | 1 | -343/+111 |
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| * | Fix spelling | Eddie Hung | 2019-06-12 | 1 | -1/+1 |
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| * | Revert "For 'stat' do not count modules with abc_box_id" | Eddie Hung | 2019-06-12 | 1 | -3/+0 |
| | | | | | This reverts commit b89bb744529fc8a5e4cd38522f86a797117f2abc. | ||||
| * | Revert "Merge remote-tracking branch 'origin/eddie/muxpack' into xc7mux" | Eddie Hung | 2019-06-12 | 2 | -247/+0 |
| | | | | | | This reverts commit 2223ca91b0cc559bb876e8e97372a8f77da1603e, reversing changes made to eaee250a6e63e58dfef63fa30c4120db78223e24. | ||||
| * | Move neg-pol to pos-pol mapping from ff_map to cells_map.v | Eddie Hung | 2019-06-12 | 1 | -0/+8 |
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| * | Be more precise when connecting during ABC9 re-integration | Eddie Hung | 2019-06-12 | 1 | -1/+3 |
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| * | Remove unnecessary undriven_bits.insert | Eddie Hung | 2019-06-12 | 1 | -4/+1 |
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| * | Remove hacky wideports_split from abc9 | Eddie Hung | 2019-06-12 | 1 | -52/+4 |
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| * | Fix compile errors when #if 1 for debug | Eddie Hung | 2019-06-12 | 1 | -7/+8 |
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| * | parse_xaiger to cope with inouts | Eddie Hung | 2019-06-12 | 1 | -6/+0 |
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| * | write_xaiger to preserve POs even if driven by constant | Eddie Hung | 2019-06-12 | 1 | -7/+6 |
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| * | Add a couple more tests | Eddie Hung | 2019-06-12 | 2 | -21/+30 |
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| * | Do not call abc9 if no outputs | Eddie Hung | 2019-06-12 | 1 | -54/+65 |
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| * | More write_xaiger cleanup | Eddie Hung | 2019-06-12 | 2 | -41/+13 |
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| * | Cleanup write_xaiger | Eddie Hung | 2019-06-12 | 1 | -92/+6 |
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| * | Consistency | Eddie Hung | 2019-06-12 | 4 | -4/+4 |
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| * | Reduce diff with master | Eddie Hung | 2019-06-12 | 1 | -1/+1 |
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| * | Remove abc_flop{,_d} attributes from ice40/cells_sim.v | Eddie Hung | 2019-06-12 | 1 | -40/+20 |
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| * | Fix spacing | Eddie Hung | 2019-06-12 | 1 | -6/+6 |
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| * | Remove wide mux inference | Eddie Hung | 2019-06-12 | 5 | -195/+3 |
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| * | Merge branch 'xc7mux' into xaig | Eddie Hung | 2019-06-12 | 1 | -1/+1 |
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| | * | Merge branch 'xc7mux' of github.com:YosysHQ/yosys into xc7mux | Eddie Hung | 2019-06-12 | 1 | -0/+5 |
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| | * | | Typo: wire delay is -W argument | Eddie Hung | 2019-06-12 | 1 | -1/+1 |
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| * | | | Revert "Merge remote-tracking branch 'origin/eddie/shregmap_improve' into ↵ | Eddie Hung | 2019-06-12 | 3 | -59/+3 |
| | | | | | | | | | | | | | | | | | | | | | | xc7mux" This reverts commit a138381ac3f2c820d187f08531ffd823d6cbcfd5, reversing changes made to b77c5da76919f7f99f171a0a2775896fbc8debc2. | ||||
| * | | | Revert "Merge remote-tracking branch 'origin/eddie/muxpack' into xc7mux" | Eddie Hung | 2019-06-12 | 3 | -268/+0 |
| | | | | | | | | | | | | | | | | This reverts commit eaee250a6e63e58dfef63fa30c4120db78223e24, reversing changes made to 935df3569b4677ac38041ff01a2f67185681f4e3. | ||||
| * | | | Revert "Merge remote-tracking branch 'origin/eddie/muxpack' into xc7mux" | Eddie Hung | 2019-06-12 | 3 | -55/+10 |
| | | | | | | | | | | | | | | | | This reverts commit 2223ca91b0cc559bb876e8e97372a8f77da1603e, reversing changes made to eaee250a6e63e58dfef63fa30c4120db78223e24. | ||||
| * | | | Merge remote-tracking branch 'origin/xc7mux' into xaig | Eddie Hung | 2019-06-12 | 34 | -518/+1434 |
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| | * | | Retry "Add "-W' wire delay arg to abc9, use from synth_xilinx" | Eddie Hung | 2019-06-12 | 2 | -6/+14 |
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| | * | | Revert "Add "-W' wire delay arg to abc9, use from synth_xilinx" | Eddie Hung | 2019-06-12 | 3 | -14/+11 |
| | |/ | | | | | | | This reverts commit 2dffa4685b830313204f5d04314a14ed6ecac8ec. | ||||
| | * | Add "-W' wire delay arg to abc9, use from synth_xilinx | Eddie Hung | 2019-06-11 | 3 | -11/+14 |
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| | * | Revert "Merge remote-tracking branch 'origin/eddie/shregmap_improve' into ↵ | Eddie Hung | 2019-06-11 | 1 | -15/+10 |
| | | | | | | | | | | | | | | | xc7mux" This reverts commit 5174082208ef9bea22ad1ba62622947375b3e83b, reversing changes made to 54379f9872ba3abdf5328994abcf5abfc7288c6b. | ||||
| | * | Merge remote-tracking branch 'origin/eddie/shregmap_improve' into xc7mux | Eddie Hung | 2019-06-11 | 1 | -10/+15 |
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| | | * | Try way that doesn't involve creating a new wire | Eddie Hung | 2019-06-11 | 1 | -10/+15 |
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| | * | | Disable dist RAM boxes due to comb loop | Eddie Hung | 2019-06-11 | 1 | -2/+2 |
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| | * | | Remove #ifndef ABC | Eddie Hung | 2019-06-11 | 1 | -4/+0 |
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| | * | | Merge remote-tracking branch 'origin/eddie/shregmap_improve' into xc7mux | Eddie Hung | 2019-06-10 | 3 | -3/+59 |
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| | | * | If d_bit already in sigbit_chain_next, create extra wire | Eddie Hung | 2019-06-10 | 1 | -3/+6 |
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| | | * | Add test | Eddie Hung | 2019-06-10 | 2 | -0/+53 |
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| | * | | Revert "Revert "Move ff_map back after ABC for shregmap"" | Eddie Hung | 2019-06-10 | 1 | -5/+5 |
| | | | | | | | | | | | | | This reverts commit e473e7456545d702c011ee7872956f94a8522865. | ||||
| | * | | Revert "Rename shregmap -tech xilinx -> xilinx_dynamic" | Eddie Hung | 2019-06-10 | 2 | -6/+6 |
| | | | | | | | | | | | | | This reverts commit 94a5f4e60985fc1e3fea75eec85638fa29874bea. | ||||
| | * | | Revert "shregmap -tech xilinx_dynamic to work -params and -enpol" | Eddie Hung | 2019-06-10 | 1 | -26/+6 |
| | | | | | | | | | | | | | This reverts commit 45d1bdf83ae6d51628e917b66f1b6043c8a3baee. | ||||
| | * | | Revert "Refactor to ShregmapTechXilinx7Static" | Eddie Hung | 2019-06-10 | 1 | -86/+46 |
| | | | | | | | | | | | | | This reverts commit e1e37db86073e545269ff440da77f57135e8b155. | ||||
| | * | | Revert "Add -tech xilinx_static" | Eddie Hung | 2019-06-10 | 1 | -13/+2 |
| | | | | | | | | | | | | | This reverts commit dfe9d95579ab98d7518d40e427af858243de4eb3. | ||||
| | * | | Revert "Continue support for ShregmapTechXilinx7Static" | Eddie Hung | 2019-06-10 | 1 | -81/+30 |
| | | | | | | | | | | | | | This reverts commit 72eda94a66c8c4938a713c9ae49d560e6b33574f. | ||||
| | * | | Revert "shregmap -tech xilinx_static to handle INIT" | Eddie Hung | 2019-06-10 | 1 | -32/+22 |
| | | | | | | | | | | | | | This reverts commit 935df3569b4677ac38041ff01a2f67185681f4e3. | ||||
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index : iCE40/yosys | |
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