| Commit message (Expand) | Author | Age | Files | Lines |
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| * | | | | | test: ice40_dsp test to read +/ice40/cells_sim.v for default params | Eddie Hung | 2020-04-22 | 1 | -0/+1 |
| * | | | | | xilinx: improve xilinx_dffopt message | Eddie Hung | 2020-04-22 | 1 | -3/+6 |
| * | | | | | xilinx: xilinx_dffopt to read cells_sim.v; fix test | Eddie Hung | 2020-04-22 | 1 | -13/+22 |
| * | | | | | kernel: Cell::getParam() to throw exception again if not found | Eddie Hung | 2020-04-22 | 1 | -3/+2 |
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* | | | | | Merge pull request #1949 from YosysHQ/eddie/select_blackbox | Eddie Hung | 2020-04-22 | 2 | -9/+54 |
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| * | | | | Update passes/cmds/select.cc | Claire Wolf | 2020-04-22 | 1 | -2/+2 |
| * | | | | tests: update select black/white-box tests | Eddie Hung | 2020-04-22 | 1 | -0/+7 |
| * | | | | select: do not select black/white boxes by default, '=' prefix to do so | Eddie Hung | 2020-04-22 | 1 | -5/+5 |
| * | | | | Add '=' selection pattern prefix for non-blackbox only patterns | Claire Wolf | 2020-04-21 | 1 | -12/+26 |
| * | | | | select: add test for not selecting inside black/white boxes | Eddie Hung | 2020-04-16 | 1 | -0/+21 |
| * | | | | select: do not select inside blackboxes | Eddie Hung | 2020-04-16 | 1 | -0/+3 |
* | | | | | Merge pull request #1983 from YosysHQ/eddie/use_default_param | Eddie Hung | 2020-04-22 | 9 | -60/+54 |
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| * | | | | Cleanup use of hard-coded default parameters in light of #1945 | Eddie Hung | 2020-04-22 | 9 | -60/+54 |
* | | | | | Merge pull request #1982 from AsuMagic/asu/cxxrtl-memory-queue-opt | whitequark | 2020-04-22 | 1 | -3/+5 |
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| * | | | | | cxxrtl: keep the memory write queue sorted on insertion. | Asu | 2020-04-22 | 1 | -3/+5 |
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* | | | | | Merge pull request #1969 from boqwxp/pool_emplace | Eddie Hung | 2020-04-22 | 1 | -2/+32 |
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| * | | | | pool: add emplace() function | Eddie Hung | 2020-04-22 | 1 | -0/+6 |
| * | | | | kernel: Rename arguments to rvalue-reference-accepting functions. | Alberto Gonzalez | 2020-04-21 | 1 | -8/+8 |
| * | | | | Add rvalue-reference-accepting `entry_t` constructor for `pool`. | Alberto Gonzalez | 2020-04-20 | 1 | -0/+1 |
| * | | | | In `pool`, construct `entry_t`s in-place and add an rvalue-accepting-and-forw... | Alberto Gonzalez | 2020-04-20 | 1 | -2/+25 |
* | | | | | Merge pull request #1973 from YosysHQ/eddie/fix1966 | Eddie Hung | 2020-04-22 | 2 | -2/+4 |
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| * | | | | | yosys-config: spelling | Eddie Hung | 2020-04-22 | 1 | -1/+1 |
| * | | | | | tests: use `yosys-config --datdir` instead of hard-coded | Eddie Hung | 2020-04-22 | 1 | -1/+3 |
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* | | | | | Merge pull request #1950 from YosysHQ/eddie/design_import | Eddie Hung | 2020-04-22 | 3 | -7/+30 |
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| * | | | | | design: add test | Eddie Hung | 2020-04-16 | 2 | -5/+22 |
| * | | | | | design: -import to not count black/white-boxes as candidates for top | Eddie Hung | 2020-04-16 | 1 | -2/+8 |
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* | | | | | Merge pull request #1976 from YosysHQ/dave/fix-sim-const | Claire Wolf | 2020-04-22 | 2 | -1/+18 |
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| * | | | | | sim: Fix handling of constant-connected cell inputs at startup | David Shah | 2020-04-21 | 2 | -1/+18 |
* | | | | | | Merge pull request #1979 from whitequark/cxxrtl-go-faster | Claire Wolf | 2020-04-22 | 2 | -184/+396 |
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| * | | | | | | cxxrtl: run edge detectors only once in eval(). | whitequark | 2020-04-22 | 1 | -6/+22 |
| * | | | | | | cxxrtl: add an unsupported knob for manipulating clock trees. | whitequark | 2020-04-22 | 1 | -0/+18 |
| * | | | | | | cxxrtl: use log_id() where appropriate. NFC. | whitequark | 2020-04-21 | 1 | -4/+4 |
| * | | | | | | cxxrtl: add (*cxxrtl.{comb,sync}*) annotations on black box outputs. | whitequark | 2020-04-21 | 1 | -65/+186 |
| * | | | | | | cxxrtl: s/sync_{wire,type}/edge_{wire,type}/. NFC. | whitequark | 2020-04-21 | 1 | -23/+23 |
| * | | | | | | cxxrtl: use one delta cycle for immediately converging netlists. | whitequark | 2020-04-21 | 2 | -11/+21 |
| * | | | | | | cxxrtl: add -O6, a shortcut for running `proc; flatten`. | whitequark | 2020-04-21 | 1 | -4/+14 |
| * | | | | | | cxxrtl: unbuffer module input wires. | whitequark | 2020-04-21 | 1 | -31/+61 |
| * | | | | | | cxxrtl: simplify generated edge detection logic. | whitequark | 2020-04-21 | 1 | -56/+29 |
| * | | | | | | cxxrtl: localize wires with multiple comb drivers, too. | whitequark | 2020-04-21 | 1 | -32/+31 |
| * | | | | | | cxxrtl: detect buffered comb wires, not just feedback wires. | whitequark | 2020-04-21 | 1 | -5/+40 |
* | | | | | | | bugpoint: Don't remove modules or cells while iterating over them. | Marcelina Kościelnicka | 2020-04-22 | 1 | -4/+14 |
* | | | | | | | intel_alm: Documentation improvements | Dan Ravensloft | 2020-04-21 | 3 | -14/+127 |
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* | | | | | | write_json: dump default parameter values | Marcelina Kościelnicka | 2020-04-21 | 1 | -0/+10 |
* | | | | | | Use default parameter value in getParam | Marcelina Kościelnicka | 2020-04-21 | 2 | -4/+13 |
* | | | | | | hierarchy: Convert positional parameters to named. | Marcelina Kościelnicka | 2020-04-21 | 2 | -3/+50 |
* | | | | | | ilang, ast: Store parameter order and default value information. | Marcelina Kościelnicka | 2020-04-21 | 6 | -9/+27 |
* | | | | | | idict: Make iterator go forward. | Marcelina Kościelnicka | 2020-04-21 | 1 | -5/+19 |
* | | | | | | Merge pull request #1971 from YosysHQ/claire/edifkeep | Claire Wolf | 2020-04-21 | 1 | -14/+108 |
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| * | | | | | | Improve net priorities in EDIF back-end | Claire Wolf | 2020-04-21 | 1 | -0/+64 |
| * | | | | | | Ignore conflicting keep attributes, unless asked not to. Fixes #1733 | Claire Wolf | 2020-04-20 | 1 | -14/+44 |
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