| Commit message (Expand) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| | * | | | | Add .editorconfig file. | whitequark | 2018-12-16 | 1 | -0/+7 | |
| * | | | | | Fix equiv_opt indenting | Clifford Wolf | 2018-12-16 | 1 | -139/+129 | |
| |/ / / / | ||||||
| * | | | | Merge pull request #724 from whitequark/equiv_opt | Clifford Wolf | 2018-12-16 | 6 | -27/+173 | |
| |\ \ \ \ | ||||||
| | * | | | | equiv_opt: pass -D EQUIV when techmapping. | whitequark | 2018-12-07 | 4 | -6/+7 | |
| | * | | | | equiv_opt: new command, for verifying optimization passes. | whitequark | 2018-12-07 | 4 | -24/+169 | |
| * | | | | | Merge pull request #734 from grahamedgecombe/fix-shuffled-bram-initdata | Clifford Wolf | 2018-12-16 | 1 | -0/+17 | |
| |\ \ \ \ \ | ||||||
| | * | | | | | memory_bram: Fix initdata bit order after shuffling | Graham Edgecombe | 2018-12-11 | 1 | -0/+17 | |
| * | | | | | | Merge pull request #730 from smunaut/ffssr_dont_touch | Clifford Wolf | 2018-12-16 | 1 | -0/+3 | |
| |\ \ \ \ \ \ | ||||||
| | * | | | | | | ice40: Honor the "dont_touch" attribute in FFSSR pass | Sylvain Munaut | 2018-12-08 | 1 | -0/+3 | |
| | |/ / / / / | ||||||
| * | | | | | | Merge pull request #729 from whitequark/write_verilog_initial | Clifford Wolf | 2018-12-16 | 1 | -0/+2 | |
| |\ \ \ \ \ \ | ||||||
| | * | | | | | | write_verilog: correctly map RTLIL `sync init`. | whitequark | 2018-12-07 | 1 | -0/+2 | |
| | | |_|_|_|/ | |/| | | | | ||||||
| * | | | | | | Merge pull request #725 from olofk/ram4k-init | Clifford Wolf | 2018-12-16 | 1 | -0/+19 | |
| |\ \ \ \ \ \ | ||||||
| | * | | | | | | Only use non-blocking assignments of SB_RAM40_4K for yosys | Olof Kindgren | 2018-12-06 | 1 | -0/+19 | |
| * | | | | | | | Merge pull request #714 from daveshah1/abc_preserve_naming | Clifford Wolf | 2018-12-16 | 1 | -29/+51 | |
| |\ \ \ \ \ \ \ | ||||||
| | * | | | | | | | abc: Preserve naming through ABC using 'dress' command | David Shah | 2018-12-06 | 1 | -29/+51 | |
| | |/ / / / / / | ||||||
| * | | | | | | | Merge pull request #723 from whitequark/synth_ice40_map_gates | Clifford Wolf | 2018-12-16 | 1 | -0/+4 | |
| |\ \ \ \ \ \ \ | ||||||
| | * | | | | | | | synth_ice40: split `map_gates` off `fine`. | whitequark | 2018-12-06 | 1 | -0/+4 | |
| | | |_|_|/ / / | |/| | | | | | ||||||
| * | | | | | | | Merge pull request #722 from whitequark/rename_src | Clifford Wolf | 2018-12-16 | 1 | -0/+50 | |
| |\ \ \ \ \ \ \ | ||||||
| | * | | | | | | | rename: add -src, for inferring names from source locations. | whitequark | 2018-12-05 | 1 | -0/+50 | |
| | |/ / / / / / | ||||||
| * | | | | | | | Merge pull request #720 from whitequark/master | Clifford Wolf | 2018-12-16 | 2 | -2/+2 | |
| |\ \ \ \ \ \ \ | |_|_|_|_|/ / |/| | | | | | | ||||||
| | * | | | | | | lut2mux: handle 1-bit INIT constant in $lut cells. | whitequark | 2018-12-05 | 1 | -1/+1 | |
| | * | | | | | | opt_lut: simplify type conversion. NFC. | whitequark | 2018-12-05 | 1 | -1/+1 | |
| | |/ / / / / | ||||||
| * | | | / / | Add yosys-smtbmc support for btor witness | Clifford Wolf | 2018-12-10 | 1 | -15/+100 | |
| | |_|_|/ / |/| | | | | ||||||
| * | | | | | Add "yosys-smtbmc --btorwit" skeleton | Clifford Wolf | 2018-12-08 | 1 | -1/+19 | |
| * | | | | | Fix btor init value handling | Clifford Wolf | 2018-12-08 | 1 | -9/+13 | |
| | |_|/ / |/| | | | ||||||
| * | | | | Merge pull request #727 from whitequark/opt_lut | David Shah | 2018-12-07 | 3 | -5/+50 | |
| |\ \ \ \ | |_|/ / |/| | | | ||||||
| | * | | | opt_lut: leave intact LUTs with cascade feeding module outputs. | whitequark | 2018-12-07 | 3 | -0/+26 | |
| | * | | | opt_lut: show original truth table for both cells. | whitequark | 2018-12-07 | 1 | -2/+3 | |
| | * | | | opt_lut: add -limit option, for debugging misoptimizations. | whitequark | 2018-12-07 | 1 | -3/+21 | |
| |/ / / | ||||||
| * | | | Add missing .gitignore | Clifford Wolf | 2018-12-06 | 1 | -0/+8 | |
| * | | | Bugfix in opt_expr handling of a<0 and a>=0 | Clifford Wolf | 2018-12-06 | 1 | -1/+1 | |
| * | | | Verific updates | Clifford Wolf | 2018-12-06 | 2 | -54/+1 | |
| |/ / | ||||||
| * | | Merge pull request #709 from smunaut/issue_708 | Clifford Wolf | 2018-12-05 | 1 | -1/+1 | |
| |\ \ | ||||||
| | * | | Make return value of $clog2 signed | Sylvain Munaut | 2018-11-24 | 1 | -1/+1 | |
| * | | | Merge pull request #718 from whitequark/gate2lut | Clifford Wolf | 2018-12-05 | 12 | -4/+151 | |
| |\ \ \ | ||||||
| | * | | | synth_ice40: add -noabc option, to use built-in LUT techmapping. | whitequark | 2018-12-05 | 1 | -2/+16 | |
| | * | | | gate2lut: new techlib, for converting Yosys gates to FPGA LUTs. | whitequark | 2018-12-05 | 10 | -0/+133 | |
| | * | | | Fix typo. | whitequark | 2018-12-05 | 1 | -2/+2 | |
| |/ / / | ||||||
| * | | | Merge pull request #713 from Diego-HR/master | Clifford Wolf | 2018-12-05 | 5 | -12/+91 | |
| |\ \ \ | ||||||
| | * | | | Changes in GoWin synth commands and ALU primitive support | Diego H | 2018-12-03 | 5 | -12/+91 | |
| * | | | | Merge pull request #712 from mmicko/anlogic-support | Clifford Wolf | 2018-12-05 | 7 | -0/+1278 | |
| |\ \ \ \ | ||||||
| | * | | | | Leave only real black box cells | Miodrag Milanovic | 2018-12-02 | 1 | -312/+0 | |
| | * | | | | Initial support for Anlogic FPGA | Miodrag Milanovic | 2018-12-01 | 7 | -0/+1590 | |
| | |/ / / | ||||||
| * | | | | Rename opt_lut.cpp to opt_lut.cc | Clifford Wolf | 2018-12-05 | 1 | -0/+0 | |
| * | | | | Merge pull request #717 from whitequark/opt_lut | Clifford Wolf | 2018-12-05 | 9 | -2/+537 | |
| |\ \ \ \ | ||||||
| | * | | | | opt_lut: add -dlogic, to avoid disturbing logic such as carry chains. | whitequark | 2018-12-05 | 3 | -20/+166 | |
| | * | | | | opt_lut: always prefer to eliminate 1-LUTs. | whitequark | 2018-12-05 | 1 | -19/+41 | |
| | * | | | | opt_lut: collect and display statistics. | whitequark | 2018-12-05 | 1 | -4/+33 | |
| | * | | | | opt_lut: refactor to use a worker. NFC. | whitequark | 2018-12-05 | 1 | -170/+177 | |
| | * | | | | synth_ice40: add -relut option, to run ice40_unlut and opt_lut. | whitequark | 2018-12-05 | 1 | -1/+13 | |
 |
index : iCE40/yosys | |
| [no description] |
| aboutsummaryrefslogtreecommitdiffstats |