iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	btor, smt2, smv: Add a hint on how to deal with funny FF types.	Marcelina Kościelnicka	2021-02-25	3	-3/+42
*	Fix handling of unique/unique0/priority cases in the frontend.	Marcelina Kościelnicka	2021-02-25	2	-15/+16
*	Extend "delay" expressions to handle pair and triplet, i.e. rise, fall and tu...	TimRudy	2021-02-24	3	-2/+445
*	Merge pull request #2607 from zachjs/logger-error-atexit	whitequark	2021-02-24	1	-3/+3
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\| *	Fix double-free on unmatched logger error pattern	Zachary Snow	2021-02-23	1	-3/+3
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*	Add tests for some common techmap files.	Marcelina Kościelnicka	2021-02-24	3	-0/+50
*	Fix syntax error in adff2dff.v	Marcelina Kościelnicka	2021-02-24	1	-1/+1
*	frontend: Make helper functions for printing locations.	Marcelina Kościelnicka	2021-02-23	4	-57/+71
*	Merge pull request #2594 from zachjs/func-arg-width	whitequark	2021-02-23	10	-47/+124
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\| *	verilog: fix sizing of constant args for tasks/functions	Zachary Snow	2021-02-21	10	-47/+124
* \|	int -> bool	Robert Baruch	2021-02-23	1	-2/+2
* \|	Adds is_wire to SigBit and SigChunk	Robert Baruch	2021-02-23	1	-0/+3
* \|	machxo2: Switch to LUT4 sim model which propagates less undefined/don't care ...	William D. Jones	2021-02-23	2	-12/+6
* \|	machxo2: Update tribuf test to reflect active-low OE.	William D. Jones	2021-02-23	1	-1/+2
* \|	machxo2: Add experimental status to help.	William D. Jones	2021-02-23	1	-1/+1
* \|	machxo2: Add DCCA and DCMA blackbox primitives.	William D. Jones	2021-02-23	1	-0/+17
* \|	machxo2: Fix reversed interpretation of REG_SD config bits.	William D. Jones	2021-02-23	1	-2/+2
* \|	machxo2: Tristate is active-low.	William D. Jones	2021-02-23	2	-5/+5
* \|	machxo2: Fix typos in FACADE_FF sim model.	William D. Jones	2021-02-23	1	-5/+4
* \|	machxo2: Fix naming of TRELLIS_IO ports to match PIO pins in routing graph.	William D. Jones	2021-02-23	2	-6/+6
* \|	machxo2: Improve help_mode output in synth_machxo2.	William D. Jones	2021-02-23	1	-5/+5
* \|	machxo2: Use attrmvcp pass to move LOC and src attributes from ports/wires to...	William D. Jones	2021-02-23	2	-1/+17
* \|	machxo2: Add missing OSCH oscillator primitive.	William D. Jones	2021-02-23	1	-0/+10
* \|	machxo2: Add believed-to-be-correct tribuf test.	William D. Jones	2021-02-23	1	-0/+9
* \|	machxo2: Add passing fsm, mux, and shifter tests.	William D. Jones	2021-02-23	3	-0/+65
* \|	machxo2: Add add_sub test. Fix tests to include FACADE_IO primitives.	William D. Jones	2021-02-23	3	-3/+11
* \|	machxo2: Add -noiopad option to synth_machxo2.	William D. Jones	2021-02-23	1	-2/+11
* \|	machxo2: Use correct INITVAL for LUT1 in FACADE_SLICE.	William D. Jones	2021-02-23	1	-1/+1
* \|	machxo2: Fix cells_sim typo where OFX1 was multiply-driven.	William D. Jones	2021-02-23	1	-1/+1
* \|	machxo2: synth_machxo2 now maps ports to FACADE_IO.	William D. Jones	2021-02-23	2	-0/+12
* \|	machxo2: Add initial value for Q in FACADE_FF.	William D. Jones	2021-02-23	1	-0/+2
* \|	machxo2: Add FACADE_IO simulation model. More comments on models.	William D. Jones	2021-02-23	1	-0/+25
* \|	machxo2: Add FACADE_SLICE simulation model.	William D. Jones	2021-02-23	1	-0/+83
* \|	machxo2: Improve FACADE_FF simulation model.	William D. Jones	2021-02-23	1	-12/+20
* \|	machxo2: Improve LUT4 techmap. Use same output port name for LUT4 as Lattice.	William D. Jones	2021-02-23	2	-4/+4
* \|	machxo2: Add dffe test.	William D. Jones	2021-02-23	1	-0/+9
* \|	machxo2: Add dff.ys test, fix another cells_map.v typo.	William D. Jones	2021-02-23	2	-1/+11
* \|	machxo2: Fix more oversights in machxo2 models. logic.ys test passes.	William D. Jones	2021-02-23	2	-2/+6
* \|	machxo2: Add test/arch/machxo2 directory (test does not pass).	William D. Jones	2021-02-23	4	-0/+15
* \|	machxo2: Fix typos. test/arch/run-test.sh passes.	William D. Jones	2021-02-23	2	-2/+2
* \|	machxo2: Create basic techlibs and synth_machxo2 pass.	William D. Jones	2021-02-23	4	-0/+320
* \|	frontend: json: parse negative values	Karol Gugala	2021-02-23	1	-2/+10
* \|	assertpmux: Fix crash on unused $pmux output.	Marcelina Kościelnicka	2021-02-22	2	-1/+19
* \|	Merge pull request #2586 from zachjs/tern-recurse	whitequark	2021-02-21	5	-19/+195
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\| * \|	verilog: support recursive functions using ternary expressions	Zachary Snow	2021-02-12	5	-19/+195
* \| \|	Merge pull request #2591 from zachjs/verilog-preproc-unapplied	whitequark	2021-02-21	3	-1/+32
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\| * \|	verilog: error on macro invocations with missing argument lists	Zachary Snow	2021-02-19	3	-1/+32
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* \|	Bump version	Yosys Bot	2021-02-18	1	-1/+1
* \|	Merge pull request #2590 from RobertBaruch/fix_fast_sop_mode	Claire Xen	2021-02-17	1	-1/+1
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\| * \|	Fixes command line for abc pass in -fast -sop mode	Robert Baruch	2021-02-16	1	-1/+1
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