| Commit message (Expand) | Author | Age | Files | Lines | ||
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| | * | | | | | Merge pull request #1563 from YosysHQ/dave/async-prld | David Shah | 2019-12-18 | 2 | -4/+28 | |
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| | | * | | | | | ecp5: Add support for mapping PRLD FFs | David Shah | 2019-12-07 | 2 | -4/+28 | |
| | * | | | | | | Merge pull request #1572 from nakengelhardt/scratchpad_pass | Eddie Hung | 2019-12-18 | 3 | -0/+136 | |
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| | | * | | | | | | use extra_args | N. Engelhardt | 2019-12-18 | 1 | -1/+1 | |
| | | * | | | | | | add assert option to scratchpad command | N. Engelhardt | 2019-12-16 | 3 | -19/+49 | |
| | | * | | | | | | add periods and newlines to help message | N. Engelhardt | 2019-12-13 | 1 | -5/+5 | |
| | | * | | | | | | add test and make help message more verbose | N. Engelhardt | 2019-12-12 | 2 | -1/+20 | |
| | | * | | | | | | add a command to read/modify scratchpad contents | N. Engelhardt | 2019-12-12 | 2 | -0/+87 | |
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| | * | | | | | | Merge pull request #1584 from YosysHQ/mwk/xilinx-flaky-test | Eddie Hung | 2019-12-18 | 1 | -2/+4 | |
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| | | * | | | | | | tests/xilinx: fix flaky mux test | Marcin Kościelnicki | 2019-12-18 | 1 | -2/+4 | |
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| | * | | | | | | xilinx: Add xilinx_dffopt pass (#1557) | Marcin Kościelnicki | 2019-12-18 | 11 | -27/+638 | |
| | * | | | | | | xilinx: Improve flip-flop handling. | Marcin Kościelnicki | 2019-12-18 | 8 | -49/+242 | |
| | * | | | | | | Send people to symbioticeda.com instead of verific.com | Clifford Wolf | 2019-12-18 | 2 | -5/+26 | |
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| * / | | | | | Cleanup | Eddie Hung | 2019-12-17 | 1 | -11/+7 | |
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| * | | | | | Merge pull request #1574 from YosysHQ/eddie/xilinx_lutram | Eddie Hung | 2019-12-16 | 13 | -65/+529 | |
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| | * \ \ \ \ | Merge branch 'eddie/xilinx_lutram' of github.com:YosysHQ/yosys into eddie/xil... | Eddie Hung | 2019-12-16 | 1 | -2/+8 | |
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| | | * | | | | | Populate DID/DOD even if unused | Eddie Hung | 2019-12-16 | 1 | -2/+8 | |
| | * | | | | | | Rename *RAM{32,64}M rules to RAM{32X2,64X1}Q | Eddie Hung | 2019-12-16 | 2 | -6/+6 | |
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| | * | | | | | Disable RAM16X1D test | Eddie Hung | 2019-12-13 | 1 | -17/+17 | |
| | * | | | | | Disable RAM16X1D match rule; carry-over from LUT4 arches | Eddie Hung | 2019-12-13 | 1 | -6/+9 | |
| | * | | | | | RAM64M8 to also have [5:0] for address | Eddie Hung | 2019-12-13 | 1 | -8/+8 | |
| | * | | | | | Remove extraneous synth_xilinx call | Eddie Hung | 2019-12-12 | 1 | -2/+0 | |
| | * | | | | | Add tests for these new models | Eddie Hung | 2019-12-12 | 1 | -0/+40 | |
| | * | | | | | Add RAM32X6SDP and RAM64X3SDP modes | Eddie Hung | 2019-12-12 | 2 | -8/+120 | |
| | * | | | | | Fix RAM64M model to have 6 bit address bus | Eddie Hung | 2019-12-12 | 1 | -4/+4 | |
| | * | | | | | Add #1460 testcase | Eddie Hung | 2019-12-12 | 1 | -0/+34 | |
| | * | | | | | Add memory rules for RAM16X1D, RAM32M, RAM64M | Eddie Hung | 2019-12-12 | 2 | -0/+168 | |
| | * | | | | | Rename memory tests to lutram, add more xilinx tests | Eddie Hung | 2019-12-12 | 9 | -53/+156 | |
| * | | | | | | Merge pull request #1521 from dh73/diego/memattr | Eddie Hung | 2019-12-16 | 7 | -48/+374 | |
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| | * | | | | | | Enforce non-existence | Eddie Hung | 2019-12-16 | 1 | -0/+4 | |
| | * | | | | | | Update doc | Eddie Hung | 2019-12-16 | 1 | -4/+6 | |
| | * | | | | | | Add another test | Eddie Hung | 2019-12-16 | 1 | -1/+8 | |
| | * | | | | | | More sloppiness, thanks @dh73 for spotting | Eddie Hung | 2019-12-16 | 1 | -4/+4 | |
| | * | | | | | | Accidentally commented out tests | Eddie Hung | 2019-12-16 | 1 | -47/+47 | |
| | * | | | | | | Add unconditional match blocks for force RAM | Eddie Hung | 2019-12-16 | 2 | -4/+45 | |
| | * | | | | | | Oops | Eddie Hung | 2019-12-16 | 1 | -4/+1 | |
| | * | | | | | | Merge blockram tests | Eddie Hung | 2019-12-16 | 3 | -47/+81 | |
| | * | | | | | | Update xc7/xcu bram rules | Eddie Hung | 2019-12-16 | 1 | -8/+4 | |
| | * | | | | | | Implement 'attributes' grammar | Eddie Hung | 2019-12-16 | 1 | -80/+88 | |
| | * | | | | | | Merge branch 'diego/memattr' of https://github.com/dh73/yosys into diego/memattr | Eddie Hung | 2019-12-16 | 4 | -1/+238 | |
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| | * | | | | | | Fixing compiler warning/issues. Moving test script to the correct place | Diego H | 2019-12-16 | 2 | -14/+14 | |
| | * | | | | | | Removing fixed attribute value to !ramstyle rules | Diego H | 2019-12-15 | 2 | -3242/+4 | |
| | * | | | | | | Merging attribute rules into a single match block; Adding tests | Diego H | 2019-12-15 | 5 | -86/+3465 | |
| | * | | | | | | Refactoring memory attribute matching based on IEEE 1364.1 and Tool specific | Diego H | 2019-12-13 | 2 | -0/+96 | |
| * | | | | | | | Merge pull request #1575 from rodrigomelo9/master | Eddie Hung | 2019-12-15 | 3 | -4/+4 | |
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| | * | | | | | | | Fixed some missing "verilog_" in documentation | Rodrigo Alejandro Melo | 2019-12-13 | 3 | -4/+4 | |
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| * | | | | | | | Merge pull request #1577 from gromero/for-yosys | Eddie Hung | 2019-12-15 | 1 | -1/+1 | |
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| | * | | | | | | | manual: Fix text in Abstract section | Gustavo Romero | 2019-12-11 | 1 | -1/+1 | |
| * | | | | | | | | Merge pull request #1578 from noopwafel/eqneq-debug | Eddie Hung | 2019-12-15 | 1 | -1/+1 | |
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| | * | | | | | | | Fix opt_expr.eqneq.cmpzero debug print | Alyssa Milburn | 2019-12-15 | 1 | -1/+1 | |
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index : iCE40/yosys | |
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