| Commit message (Expand) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| | | * | | | | | | | | | Revert "Output "h" extension only if boxes" | Eddie Hung | 2019-08-28 | 1 | -32/+28 | |
| | | * | | | | | | | | | Merge remote-tracking branch 'origin/eddie/fix_carry_wrapper' into xaig_arrival | Eddie Hung | 2019-08-28 | 2 | -1/+48 | |
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| | | * | | | | | | | | | | Add arrival times for HX devices | Eddie Hung | 2019-08-28 | 1 | -21/+114 | |
| | | * | | | | | | | | | | Specify ice40 family to cells_sim.v using define | Eddie Hung | 2019-08-28 | 1 | -1/+8 | |
| | | * | | | | | | | | | | Merge remote-tracking branch 'origin/eddie/fix_carry_wrapper' into xaig_arrival | Eddie Hung | 2019-08-28 | 5 | -68/+20 | |
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| | | * | | | | | | | | | | | Account for D port being a constant | Eddie Hung | 2019-08-28 | 1 | -4/+4 | |
| | | * | | | | | | | | | | | Merge branch 'eddie/xilinx_srl' into xaig_arrival | Eddie Hung | 2019-08-28 | 13 | -225/+819 | |
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| | | * \ \ \ \ \ \ \ \ \ \ \ | Merge remote-tracking branch 'origin/master' into xaig_arrival | Eddie Hung | 2019-08-28 | 33 | -409/+1901 | |
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| | | * \ \ \ \ \ \ \ \ \ \ \ \ | Merge branch 'xaig_arrival' of github.com:YosysHQ/yosys into xaig_arrival | Eddie Hung | 2019-08-23 | 2 | -14/+1 | |
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| | | | * | | | | | | | | | | | | | Revert to upstream | Eddie Hung | 2019-08-23 | 1 | -2/+2 | |
| | | | * | | | | | | | | | | | | | Fix spacing | Eddie Hung | 2019-08-23 | 1 | -1/+1 | |
| | | | * | | | | | | | | | | | | | Remove unused model | Eddie Hung | 2019-08-23 | 1 | -13/+0 | |
| | | * | | | | | | | | | | | | | | Cleanup | Eddie Hung | 2019-08-23 | 1 | -130/+59 | |
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| | | * | | | | | | | | | | | | | Put attributes above port | Eddie Hung | 2019-08-23 | 2 | -27/+62 | |
| | | * | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xaig_arrival | Eddie Hung | 2019-08-23 | 28 | -114/+1110 | |
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| | | * | | | | | | | | | | | | | | Use semicolon | Eddie Hung | 2019-08-21 | 1 | -1/+1 | |
| | | * | | | | | | | | | | | | | | techmap before read | Eddie Hung | 2019-08-21 | 1 | -1/+1 | |
| | | * | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xaig_arrival | Eddie Hung | 2019-08-21 | 0 | -0/+0 | |
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| | | * \ \ \ \ \ \ \ \ \ \ \ \ \ \ | Merge remote-tracking branch 'origin/master' into xaig_arrival | Eddie Hung | 2019-08-21 | 2 | -2/+2 | |
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| | | * | | | | | | | | | | | | | | | | Output "h" extension only if boxes | Eddie Hung | 2019-08-21 | 1 | -28/+32 | |
| | | * | | | | | | | | | | | | | | | | Revert "Fix omode which inserts an output if none exists (otherwise abc9 brea... | Eddie Hung | 2019-08-21 | 1 | -8/+7 | |
| | | * | | | | | | | | | | | | | | | | Add abc_arrival to SRL* | Eddie Hung | 2019-08-21 | 1 | -3/+5 | |
| | | * | | | | | | | | | | | | | | | | Fix omode which inserts an output if none exists (otherwise abc9 breaks) | Eddie Hung | 2019-08-20 | 1 | -7/+8 | |
| | | * | | | | | | | | | | | | | | | | Revert "Only xaig if GetSize(output_bits) > 0" | Eddie Hung | 2019-08-20 | 1 | -149/+147 | |
| | | * | | | | | | | | | | | | | | | | Only xaig if GetSize(output_bits) > 0 | Eddie Hung | 2019-08-20 | 1 | -147/+149 | |
| | | * | | | | | | | | | | | | | | | | Oops | Eddie Hung | 2019-08-20 | 1 | -1/+1 | |
| | | * | | | | | | | | | | | | | | | | Merge branch 'eddie/fix_techmap' into xaig_arrival | Eddie Hung | 2019-08-20 | 4 | -1/+16 | |
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| | | * | | | | | | | | | | | | | | | | | techmap -max_iter to apply to each module individually | Eddie Hung | 2019-08-20 | 1 | -4/+6 | |
| | | * | | | | | | | | | | | | | | | | | xilinx to use abc_map.v with -max_iter 1 | Eddie Hung | 2019-08-20 | 6 | -171/+26 | |
| | | * | | | | | | | | | | | | | | | | | ecp5: remove DPR16X4 from abc_unmap.v | Eddie Hung | 2019-08-20 | 1 | -20/+0 | |
| | | * | | | | | | | | | | | | | | | | | ecp5 to use -max_iter 1 | Eddie Hung | 2019-08-20 | 3 | -4/+3 | |
| | | * | | | | | | | | | | | | | | | | | ecp5 to use abc_map.v and _unmap.v | Eddie Hung | 2019-08-20 | 7 | -14/+89 | |
| | | * | | | | | | | | | | | | | | | | | Add (* abc_arrival=<int> *) doc | Eddie Hung | 2019-08-20 | 1 | -0/+5 | |
| | | * | | | | | | | | | | | | | | | | | Add reference to FD* timing | Eddie Hung | 2019-08-20 | 1 | -0/+2 | |
| | | * | | | | | | | | | | | | | | | | | Remove sequential extension | Eddie Hung | 2019-08-20 | 9 | -730/+68 | |
| | | * | | | | | | | | | | | | | | | | | Remove SRL* delays from cells_sim.v | Eddie Hung | 2019-08-20 | 1 | -5/+3 | |
| | | * | | | | | | | | | | | | | | | | | retime_mode -> dff_mode | Eddie Hung | 2019-08-20 | 1 | -7/+7 | |
| | | * | | | | | | | | | | | | | | | | | LUTMUX -> LUTMUX6 | Eddie Hung | 2019-08-20 | 1 | -2/+2 | |
| | | * | | | | | | | | | | | | | | | | | Cleanup techmap in map_luts | Eddie Hung | 2019-08-20 | 1 | -3/+5 | |
| | | * | | | | | | | | | | | | | | | | | Move `techmap abc_map.v` into map_luts | Eddie Hung | 2019-08-20 | 1 | -1/+2 | |
| | | * | | | | | | | | | | | | | | | | | Remove delays from abc_map.v | Eddie Hung | 2019-08-20 | 1 | -5/+2 | |
| | | * | | | | | | | | | | | | | | | | | Typo | Eddie Hung | 2019-08-20 | 1 | -1/+1 | |
| | | * | | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xaig_dff | Eddie Hung | 2019-08-20 | 5 | -16/+23 | |
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| | | * | | | | | | | | | | | | | | | | | | Do not sigmap! | Eddie Hung | 2019-08-20 | 1 | -2/+2 | |
| | | * | | | | | | | | | | | | | | | | | | Deprecate `abc_scc_break` attribute | Eddie Hung | 2019-08-20 | 1 | -8/+0 | |
| | | * | | | | | | | | | | | | | | | | | | Wrap SRL{16,32} too | Eddie Hung | 2019-08-20 | 3 | -7/+98 | |
| | | * | | | | | | | | | | | | | | | | | | Wrap LUTRAMs in order to capture comb/seq behaviour | Eddie Hung | 2019-08-20 | 5 | -36/+200 | |
| | | * | | | | | | | | | | | | | | | | | | Minor refactor | Eddie Hung | 2019-08-20 | 1 | -7/+6 | |
| | | * | | | | | | | | | | | | | | | | | | Add LUTRAM delays | Eddie Hung | 2019-08-20 | 1 | -3/+6 | |
| | | * | | | | | | | | | | | | | | | | | | Fix use of {CLK,EN}_POLARITY, also add a FIXME | Eddie Hung | 2019-08-20 | 1 | -65/+13 | |
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index : iCE40/yosys | |
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