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| | * | | Add tests, fix for !=Eddie Hung2019-06-063-9/+110
| | * | | Missing fileEddie Hung2019-06-061-0/+232
| | * | | Initial adaptation of muxpack from shregmapEddie Hung2019-06-061-0/+1
| * | | | shregmap -tech xilinx_static to handle INITEddie Hung2019-06-051-22/+32
| * | | | Continue support for ShregmapTechXilinx7StaticEddie Hung2019-06-051-30/+81
| * | | | Update abc attributes on FD*E_1Eddie Hung2019-06-051-6/+26
| * | | | CleanupEddie Hung2019-06-052-17/+0
| * | | | Call shregmap -tech xilinx_staticEddie Hung2019-06-051-1/+1
| * | | | Revert "Move ff_map back after ABC for shregmap"Eddie Hung2019-06-051-4/+4
| * | | | Add -tech xilinx_staticEddie Hung2019-06-051-2/+13
| * | | | Refactor to ShregmapTechXilinx7StaticEddie Hung2019-06-051-46/+86
| * | | | shregmap -tech xilinx_dynamic to work -params and -enpolEddie Hung2019-06-051-6/+26
| * | | | Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-06-053-28/+95
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| * \ \ \ \ Merge remote-tracking branch 'origin/clifford/fix1065' into xc7muxEddie Hung2019-06-052-2/+2
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| * | | | | | Rename shregmap -tech xilinx -> xilinx_dynamicEddie Hung2019-06-042-6/+6
| * | | | | | Add log_assert to ensure no loopsEddie Hung2019-06-041-1/+15
| * | | | | | Only toposort builtin and abc typesEddie Hung2019-06-041-6/+9
| * | | | | | Add space between -D and _ABCEddie Hung2019-06-041-2/+2
| * | | | | | Add (* abc_flop_q *) to brams_bb.vEddie Hung2019-06-041-8/+8
| * | | | | | Fix name clashEddie Hung2019-06-041-11/+11
| * | | | | | Add mux_map.v for wide muxEddie Hung2019-06-044-30/+82
| * | | | | | Move ff_map back after ABC for shregmapEddie Hung2019-06-031-4/+4
| * | | | | | Respect -nocarryEddie Hung2019-06-031-1/+3
| * | | | | | Fix pmux2shiftx logicEddie Hung2019-06-031-1/+1
| * | | | | | Merge mistakeEddie Hung2019-06-031-14/+6
| * | | | | | Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-06-036-5/+40
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| * | | | | | | TypoEddie Hung2019-06-031-1/+1
| * | | | | | | IS_C_INVERTEDEddie Hung2019-06-031-4/+4
| * | | | | | | Fix `ifndefEddie Hung2019-06-031-1/+1
| * | | | | | | Make SB_LUT4 a whitebox, SB_DFF a blackbox (for now)Eddie Hung2019-06-034-8/+8
| * | | | | | | Assert that box_unique_id is indeed uniqueEddie Hung2019-06-031-2/+3
| * | | | | | | Remove dupeEddie Hung2019-06-031-7/+7
| * | | | | | | Skip internal modules when generating box_unique_idEddie Hung2019-06-031-0/+1
| * | | | | | | When creating new holes cell, inherit parameters tooEddie Hung2019-06-031-1/+3
| * | | | | | | OoopsieEddie Hung2019-06-031-1/+1
| * | | | | | | Consistent with xilinxEddie Hung2019-06-033-4/+4
| * | | | | | | Add flops as blackboxesEddie Hung2019-05-312-0/+27
| * | | | | | | Add FD*E_1 -> FD*E techmap rulesEddie Hung2019-05-311-5/+31
| * | | | | | | Techmap flops before ABC againEddie Hung2019-05-311-4/+4
| * | | | | | | parse_xaiger to cope with flopsEddie Hung2019-05-312-83/+123
| * | | | | | | ABC9 to understand flopsEddie Hung2019-05-311-46/+27
| * | | | | | | Merge branch 'xaig' into xc7muxEddie Hung2019-05-315-15/+99
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| * | | | | | | | Throw out unused code inherited from abcEddie Hung2019-05-311-212/+3
| * | | | | | | | Fix issue where keep signal became PI, but also box was adding CI driverEddie Hung2019-05-301-5/+19
| * | | | | | | | read_xaiger() to name box signalsEddie Hung2019-05-301-4/+8
| * | | | | | | | Fix spellingEddie Hung2019-05-301-1/+1
| * | | | | | | | Remove whitebox attribute from DRAMs for nowEddie Hung2019-05-301-2/+2
| * | | | | | | | Do not re-sort box_module portsEddie Hung2019-05-301-4/+6
| * | | | | | | | Remove whitespaceEddie Hung2019-05-301-1/+0
| * | | | | | | | Revert "Re-enable &dc2"Eddie Hung2019-05-301-1/+1