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| author | Eddie Hung <eddie@fpgeh.com> | 2019-06-04 14:34:36 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-04 14:34:36 -0700 |
| commit | 94a5f4e60985fc1e3fea75eec85638fa29874bea (patch) | |
| tree | cfcb9f7d9992049741b7051937119e69d9e8b29b | |
| parent | 7b186740d33972612cfc9f2ebe31258edb0cca2b (diff) | |
| download | yosys-94a5f4e60985fc1e3fea75eec85638fa29874bea.tar.gz yosys-94a5f4e60985fc1e3fea75eec85638fa29874bea.tar.bz2 yosys-94a5f4e60985fc1e3fea75eec85638fa29874bea.zip | |
Rename shregmap -tech xilinx -> xilinx_dynamic
| -rw-r--r-- | passes/techmap/shregmap.cc | 8 | ||||
| -rw-r--r-- | techlibs/xilinx/synth_xilinx.cc | 4 |
2 files changed, 6 insertions, 6 deletions
diff --git a/passes/techmap/shregmap.cc b/passes/techmap/shregmap.cc index 75eedfbcc..3e2c34c0d 100644 --- a/passes/techmap/shregmap.cc +++ b/passes/techmap/shregmap.cc @@ -93,12 +93,12 @@ struct ShregmapTechGreenpak4 : ShregmapTech } }; -struct ShregmapTechXilinx7 : ShregmapTech +struct ShregmapTechXilinx7Dynamic : ShregmapTech { dict<SigBit, std::tuple<Cell*,int,int>> sigbit_to_shiftx_offset; const ShregmapOptions &opts; - ShregmapTechXilinx7(const ShregmapOptions &opts) : opts(opts) {} + ShregmapTechXilinx7Dynamic(const ShregmapOptions &opts) : opts(opts) {} virtual void init(const Module* module, const SigMap &sigmap) override { @@ -660,11 +660,11 @@ struct ShregmapPass : public Pass { opts.zinit = true; opts.tech = new ShregmapTechGreenpak4; } - else if (tech == "xilinx") { + else if (tech == "xilinx_dynamic") { opts.init = true; opts.params = true; enpol = "any_or_none"; - opts.tech = new ShregmapTechXilinx7(opts); + opts.tech = new ShregmapTechXilinx7Dynamic(opts); } else { argidx--; break; diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc index e9eccfc0e..b2559d272 100644 --- a/techlibs/xilinx/synth_xilinx.cc +++ b/techlibs/xilinx/synth_xilinx.cc @@ -263,8 +263,8 @@ struct SynthXilinxPass : public ScriptPass // shregmap operates on bit-level flops, not word-level, // so break those down here run("simplemap t:$dff t:$dffe", "(skip if '-nosrl')"); - // shregmap with '-tech xilinx' infers variable length shift regs - run("shregmap -tech xilinx -minlen 3", "(skip if '-nosrl')"); + // shregmap to infer variable length shift regs + run("shregmap -tech xilinx_dynamic -minlen 3", "(skip if '-nosrl')"); } std::string techmap_files = " -map +/techmap.v"; |