| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Tidy up, fix undriven | Eddie Hung | 2019-09-19 | 1 | -32/+34 |
| * | Add an index | Eddie Hung | 2019-09-19 | 2 | -0/+3 |
| * | $__ABC_REG to have WIDTH parameter | Eddie Hung | 2019-09-19 | 2 | -17/+18 |
| * | Fix DSP48E1 timing by breaking P path if MREG or PREG | Eddie Hung | 2019-09-19 | 4 | -349/+363 |
| * | Revert "Different approach to timing" | Eddie Hung | 2019-09-19 | 4 | -195/+405 |
| * | Different approach to timing | Eddie Hung | 2019-09-19 | 4 | -405/+195 |
| * | Fix width of D | Eddie Hung | 2019-09-19 | 1 | -1/+1 |
| * | Add mac.sh and macc_tb.v for testing | Eddie Hung | 2019-09-19 | 2 | -0/+99 |
| * | Suppress $anyseq warnings | Eddie Hung | 2019-09-19 | 1 | -15/+32 |
| * | Use ID() macro | Eddie Hung | 2019-09-19 | 2 | -210/+210 |
| * | Use (* techmap_autopurge *) to suppress techmap warnings | Eddie Hung | 2019-09-19 | 2 | -94/+99 |
| * | D is 25 bits not 24 bits wide | Eddie Hung | 2019-09-19 | 1 | -1/+1 |
| * | Merge remote-tracking branch 'origin/clifford/fix1381' into xc7dsp | Eddie Hung | 2019-09-19 | 14 | -95/+723 |
| |\ | |||||
| | * | Add techmap_autopurge attribute, fixes #1381 | Clifford Wolf | 2019-09-19 | 1 | -5/+49 |
| | * | Use extractinv for synth_xilinx -ise | Marcin Kościelnicki | 2019-09-19 | 8 | -90/+502 |
| | * | Added extractinv pass | Marcin Kościelnicki | 2019-09-19 | 5 | -0/+172 |
| | * | Document (* gentb_skip *) attr for test_autotb | Eddie Hung | 2019-09-18 | 1 | -0/+3 |
| * | | When two boxes connect to each other, need not be a (* keep *) | Eddie Hung | 2019-09-19 | 1 | -6/+1 |
| * | | Re-enable sign extension for C input | Eddie Hung | 2019-09-19 | 1 | -4/+4 |
| * | | synth_xilinx to infer DSPs for Y_WIDTH >= 9 and [AB]_WIDTH >= 2 | Eddie Hung | 2019-09-19 | 1 | -1/+4 |
| * | | Tidy up synth_ice40, only restrict DSP_B_MINWIDTH=2 | Eddie Hung | 2019-09-19 | 1 | -1/+3 |
| * | | Do not perform width-checks for DSP48E1 which is much more complicated | Eddie Hung | 2019-09-19 | 1 | -11/+0 |
| * | | Remove TODO as check should not be necessary | Eddie Hung | 2019-09-19 | 1 | -1/+0 |
| * | | Revert index to select | Eddie Hung | 2019-09-19 | 1 | -1/+1 |
| * | | Cleanup xilinx_dsp too | Eddie Hung | 2019-09-19 | 1 | -37/+28 |
| * | | Refactor ce{mux,pol} -> hold{mux,pol} | Eddie Hung | 2019-09-19 | 2 | -77/+77 |
| * | | Add HOLD/RST support for SB_MAC16 | Eddie Hung | 2019-09-19 | 2 | -69/+116 |
| * | | Add support for SB_MAC16 CD and H registers | Eddie Hung | 2019-09-19 | 2 | -13/+73 |
| * | | Refactor ice40_dsp.pmg | Eddie Hung | 2019-09-19 | 2 | -194/+426 |
| * | | Add more entries | Eddie Hung | 2019-09-19 | 1 | -0/+1 |
| * | | Format macc.v | Eddie Hung | 2019-09-19 | 1 | -8/+8 |
| * | | Cleanup | Eddie Hung | 2019-09-19 | 1 | -8/+4 |
| * | | Remove stat | Eddie Hung | 2019-09-18 | 1 | -1/+0 |
| * | | Merge remote-tracking branch 'origin/master' into xc7dsp | Eddie Hung | 2019-09-18 | 3 | -15/+44 |
| |\| | |||||
| | * | Merge pull request #1355 from YosysHQ/eddie/peepopt_dffmuxext | Eddie Hung | 2019-09-18 | 6 | -14/+291 |
| | |\ | |||||
| | | * | Oops | Eddie Hung | 2019-09-13 | 1 | -1/+1 |
| | | * | Add counter-example from @cliffordwolf | Eddie Hung | 2019-09-13 | 1 | -0/+24 |
| | | * | Revert "Make one check $shift(x)? only; change testcase to be 8b" | Eddie Hung | 2019-09-13 | 2 | -5/+4 |
| | | * | Tidy up | Eddie Hung | 2019-09-11 | 1 | -10/+16 |
| | | * | Fix UB | Eddie Hung | 2019-09-11 | 1 | -2/+2 |
| * | | | Add doc on pattern detector for overflow | Eddie Hung | 2019-09-18 | 1 | -0/+5 |
| * | | | Merge remote-tracking branch 'origin/master' into xc7dsp | Eddie Hung | 2019-09-18 | 18 | -970/+19474 |
| |\| | | |||||
| | * | | Merge pull request #1379 from mmicko/sim_models | Eddie Hung | 2019-09-18 | 2 | -7/+162 |
| | |\ \ | |||||
| | | * | | make note that it is for latch mode | Miodrag Milanovic | 2019-09-18 | 1 | -0/+1 |
| | | * | | better lut handling | Miodrag Milanovic | 2019-09-18 | 1 | -4/+14 |
| | | * | | better handling of lut and begin/end add | Miodrag Milanovic | 2019-09-18 | 1 | -4/+10 |
| | | * | | Added simulation models for Efinix and Anlogic | Miodrag Milanovic | 2019-09-15 | 2 | -3/+141 |
| | * | | | Add "write_aiger -L" | Clifford Wolf | 2019-09-18 | 1 | -5/+16 |
| | * | | | Fix stupid bug in btor back-end | Clifford Wolf | 2019-09-18 | 1 | -1/+1 |
| | * | | | Bump version | Clifford Wolf | 2019-09-16 | 1 | -1/+1 |
 |
index : iCE40/yosys | |
| [no description] |
| aboutsummaryrefslogtreecommitdiffstats |