| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | techmap inside map_cells stage | Eddie Hung | 2019-04-05 | 2 | -2/+1 |
| * | Merge branch 'map_cells_before_map_luts' into xc7srl | Eddie Hung | 2019-04-04 | 1 | -0/+1 |
| |\ |
|
| | * | Missing techmap entry in help | Eddie Hung | 2019-04-04 | 1 | -0/+1 |
| * | | Use soft-logic, not LUT3 instantiation | Eddie Hung | 2019-04-04 | 1 | -4/+2 |
| * | | Merge branch 'map_cells_before_map_luts' into xc7srl | Eddie Hung | 2019-04-04 | 2 | -13/+13 |
| |\| |
|
| | * | synth_xilinx to map_cells before map_luts | Eddie Hung | 2019-04-04 | 1 | -12/+12 |
| | * | Merge pull request #913 from smunaut/fix_proc_mux | Eddie Hung | 2019-04-03 | 1 | -1/+1 |
| | |\ |
|
| | | * | proc_mux: Fix crash when trying to optimize non-existant mux to shiftx | Sylvain Munaut | 2019-04-03 | 1 | -1/+1 |
| | |/ |
|
| * | | Cleanup comments | Eddie Hung | 2019-04-04 | 1 | -5/+4 |
| * | | t:$dff* -> t:$dff t:$dffe | Eddie Hung | 2019-04-04 | 1 | -2/+2 |
| * | | Remove handling for $pmux, since #895 | Eddie Hung | 2019-04-03 | 1 | -40/+0 |
| * | | -nosrl meant when -nobram | Eddie Hung | 2019-04-03 | 1 | -1/+1 |
| * | | Remove duplicate STARTUPE2 | Eddie Hung | 2019-04-03 | 1 | -1/+0 |
| * | | Disable shregmap in synth_xilinx if -retime | Eddie Hung | 2019-04-03 | 1 | -3/+3 |
| * | | Add changelog entry | Eddie Hung | 2019-04-03 | 1 | -0/+1 |
| * | | Merge remote-tracking branch 'origin/master' into xc7srl | Eddie Hung | 2019-04-03 | 14 | -73/+526 |
| |\| |
|
| | * | Merge pull request #912 from YosysHQ/bram_addr_en | Clifford Wolf | 2019-04-03 | 1 | -0/+2 |
| | |\ |
|
| | | * | memory_bram: Consider read enable for address expansion register | David Shah | 2019-04-02 | 1 | -0/+2 |
| | * | | Merge pull request #910 from ucb-bar/memupdates | Clifford Wolf | 2019-04-03 | 1 | -30/+173 |
| | |\ \
| | |/
| |/| |
|
| | | * | Refine memory support to deal with general Verilog memory definitions. | Jim Lawson | 2019-04-01 | 1 | -30/+173 |
| | * | | Merge pull request #895 from YosysHQ/pmux2shiftx | Eddie Hung | 2019-04-02 | 1 | -0/+28 |
| | |\ \
| | |/
| |/| |
|
| | | * | Create one $shiftx per bit in width | Eddie Hung | 2019-03-25 | 1 | -10/+17 |
| | | * | Add a pmux-to-shiftx optimisation to proc_mux | Eddie Hung | 2019-03-23 | 1 | -0/+21 |
| | * | | Merge pull request #907 from YosysHQ/clifford/fix906 | Clifford Wolf | 2019-03-30 | 1 | -0/+2 |
| | |\ \ |
|
| | | * | | Build Verilog parser with -DYYMAXDEPTH=100000, fixes #906 | Clifford Wolf | 2019-03-29 | 1 | -0/+2 |
| | |/ / |
|
| | * | | Merge pull request #901 from trcwm/libertyfixes | Clifford Wolf | 2019-03-28 | 4 | -9/+151 |
| | |\ \ |
|
| | | * | | Liberty file parser now accepts superfluous ; | Niels Moseley | 2019-03-27 | 1 | -1/+1 |
| | | * | | Liberty file parser now accepts superfluous ; | Niels Moseley | 2019-03-27 | 1 | -1/+1 |
| | | * | | Liberty file parser now accepts superfluous ; | Niels Moseley | 2019-03-27 | 4 | -9/+151 |
| | * | | | Merge pull request #903 from YosysHQ/bram_reset_transp | Clifford Wolf | 2019-03-28 | 1 | -0/+1 |
| | |\ \ \
| | |/ /
| |/| | |
|
| | | * | | memory_bram: Reset make_transp when growing read ports | David Shah | 2019-03-27 | 1 | -0/+1 |
| | * | | | Add "read -verific" and "read -noverific" | Clifford Wolf | 2019-03-27 | 1 | -6/+28 |
| | * | | | Add "rename -output" | Clifford Wolf | 2019-03-27 | 1 | -3/+23 |
| | * | | | Improve "rename" help message | Clifford Wolf | 2019-03-27 | 1 | -0/+6 |
| | * | | | Add "cutpoint -undef" | Clifford Wolf | 2019-03-26 | 1 | -10/+14 |
| | * | | | Add "hdlname" attribute | Clifford Wolf | 2019-03-26 | 2 | -0/+5 |
| | * | | | Fix "verific -extnets" for more complex situations | Clifford Wolf | 2019-03-26 | 2 | -15/+93 |
| * | | | | synth_xilinx to use shregmap with -minlen 3 | Eddie Hung | 2019-03-25 | 1 | -2/+2 |
| * | | | | Merge remote-tracking branch 'origin/master' into xc7srl | Eddie Hung | 2019-03-25 | 15 | -37/+943 |
| |\| | | |
|
| | * | | | Add "cutpoint" pass | Clifford Wolf | 2019-03-25 | 2 | -0/+165 |
| | |/ / |
|
| | * | | Merge pull request #896 from YosysHQ/transp_fixes | Clifford Wolf | 2019-03-25 | 1 | -9/+16 |
| | |\ \ |
|
| | | * | | memory_bram: Fix multiclock make_transp | David Shah | 2019-03-24 | 1 | -9/+16 |
| | | |/ |
|
| | * | | Merge pull request #897 from trcwm/libertyfixes | Clifford Wolf | 2019-03-25 | 8 | -22/+645 |
| | |\ \
| | |/
| |/| |
|
| | | * | spaces -> tabs | Niels Moseley | 2019-03-25 | 1 | -78/+78 |
| | | * | EOL is now accepted as ';' replacement on lines that look like: feature_xyz(o... | Niels Moseley | 2019-03-25 | 1 | -4/+3 |
| | | * | Updated the liberty parser to accept [A:B] ranges (AST has not been updated).... | Niels Moseley | 2019-03-24 | 8 | -7/+631 |
| | |/ |
|
| | * | Add "mutate -none -mode", "mutate -mode none" | Clifford Wolf | 2019-03-23 | 1 | -1/+30 |
| | * | Add "mutate -s <filename>" | Clifford Wolf | 2019-03-23 | 1 | -2/+24 |
| | * | Merge pull request #893 from YosysHQ/clifford/btormeminit | Clifford Wolf | 2019-03-23 | 3 | -3/+63 |
| | |\ |
|
| | | * | Add support for memory initialization to write_btor | Clifford Wolf | 2019-03-23 | 1 | -0/+53 |
