iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Fix opt_rmdff handling of $_DFFSR_???_ and $_DLATCHSR_???_, fixes #816	Clifford Wolf	2019-02-21	1	-6/+7
*	Merge pull request #817 from eddiehung/dff_init	Eddie Hung	2019-02-20	1	-21/+0
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\| *	Remove simple_defparam tests	Eddie Hung	2019-02-20	1	-21/+0
* \|	Merge pull request #805 from eddiehung/dff_init	Eddie Hung	2019-02-19	4	-2/+76
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\| *	Instead of INIT param on cells, use initial statement with hier ref as	Eddie Hung	2019-02-17	1	-18/+13
\| *	Revert "Add INIT parameter to all ff/latch cells"	Eddie Hung	2019-02-17	2	-86/+43
\| *	Merge https://github.com/YosysHQ/yosys into dff_init	Eddie Hung	2019-02-17	9	-100/+345
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* \|	Merge pull request #811 from ucb-bar/firrtlfixes	Clifford Wolf	2019-02-17	6	-56/+298
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\| * \|	Removed unused variables, functions.	Jim Lawson	2019-02-15	1	-20/+0
\| * \|	Append (instead of over-writing) EXTRA_FLAGS	Jim Lawson	2019-02-15	1	-1/+1
\| * \|	Update cells supported for verilog to FIRRTL conversion.	Jim Lawson	2019-02-15	5	-55/+317
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* \|	Fix sign handling of real constants	Clifford Wolf	2019-02-13	1	-5/+4
* \|	Merge pull request #802 from whitequark/write_verilog_async_mem_ports	Clifford Wolf	2019-02-12	1	-38/+41
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\| * \|	write_verilog: correctly emit asynchronous transparent ports.	whitequark	2019-01-29	1	-38/+41
* \| \|	Merge pull request #806 from daveshah1/fsm_opt_no_reset	Clifford Wolf	2019-02-12	1	-1/+2
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\| * \| \|	fsm_opt: Fix runtime error for FSMs without a reset state	David Shah	2019-02-07	1	-1/+2
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\| \| *	Cope WIDTH of ff/latch cells is default of zero	Eddie Hung	2019-02-06	1	-6/+6
\| \| *	Remove check for cell->name[0] == '$'	Eddie Hung	2019-02-06	1	-1/+1
\| \| *	Refactor	Eddie Hung	2019-02-06	1	-21/+5
\| \| *	write_verilog to cope with init attr on q when -noexpr	Eddie Hung	2019-02-06	1	-2/+32
\| \| *	Add INIT parameter to all ff/latch cells	Eddie Hung	2019-02-06	2	-43/+86
\| \| *	Add tests for simple cases using defparam	Eddie Hung	2019-02-06	1	-0/+21
\| \| *	Add -B option to autotest.sh to append to backend_opts	Eddie Hung	2019-02-06	1	-2/+4
\| \| *	Extend testcase	Eddie Hung	2019-02-06	1	-2/+34
\| \| *	Add testcase	Eddie Hung	2019-02-06	1	-0/+10
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* \|	Add missing blackslash-to-slash convertion to smtio.py (matching Smt2Worker::...	Clifford Wolf	2019-02-06	1	-1/+1
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*	Merge pull request #798 from mmicko/master	Clifford Wolf	2019-01-27	1	-1/+1
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\| *	Fixed Anlogic simulation model	Miodrag Milanovic	2019-01-25	1	-1/+1
* \|	Merge pull request #800 from whitequark/write_verilog_tribuf	Clifford Wolf	2019-01-27	1	-0/+12
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\| * \|	write_verilog: write $tribuf cell as ternary.	whitequark	2019-01-27	1	-0/+12
* \| \|	Merge branch 'whitequark-write_verilog_keyword'	Clifford Wolf	2019-01-27	5	-69/+27
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\| * \|	Remove asicworld tests for (unsupported) switch-level modelling	Clifford Wolf	2019-01-27	4	-69/+0
\| * \|	write_verilog: escape names that match SystemVerilog keywords.	whitequark	2019-01-27	1	-0/+27
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* \|	Merge pull request #796 from whitequark/proc_clean_typo	David Shah	2019-01-25	1	-1/+1
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\| *	proc_clean: fix critical typo.	whitequark	2019-01-23	1	-1/+1
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*	Merge pull request #793 from whitequark/proc_clean_fix_fully_def	Clifford Wolf	2019-01-19	1	-1/+7
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\| *	proc_clean: fix fully def check to consider compare/signal length.	whitequark	2019-01-18	1	-1/+7
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*	Cleanups in igloo2 example design	Clifford Wolf	2019-01-17	6	-7/+4
*	Add SF2 IO buffer insertion	Clifford Wolf	2019-01-17	6	-3/+171
*	Improve Igloo2 example	Clifford Wolf	2019-01-17	8	-22/+41
*	Add "synth_sf2 -vlog", fix "synth_sf2 -edif"	Clifford Wolf	2019-01-17	1	-2/+17
*	Add "write_edif -gndvccy"	Clifford Wolf	2019-01-17	1	-5/+13
*	Add optional nullstr argument to log_id()	Clifford Wolf	2019-01-15	1	-1/+3
*	Fix handling of $shiftx in Verilog back-end	Clifford Wolf	2019-01-15	1	-3/+6
*	Merge pull request #788 from whitequark/master	Clifford Wolf	2019-01-15	1	-5/+17
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\| *	manual: document some gates.	whitequark	2019-01-14	1	-9/+11
\| *	manual: explain $tribuf cell.	whitequark	2019-01-14	1	-0/+10
* \|	Merge pull request #787 from whitequark/flowmap_relax	Clifford Wolf	2019-01-15	7	-35/+776
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\| *	flowmap: clean up terminology.	whitequark	2019-01-08	1	-17/+18
\| *	flowmap: implement depth relaxation.	whitequark	2019-01-08	7	-22/+762