iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
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* \| \| \| \| \|	Merge pull request #1971 from YosysHQ/claire/edifkeep	Claire Wolf	2020-04-21	1	-14/+108
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\| * \| \| \| \| \|	Improve net priorities in EDIF back-end	Claire Wolf	2020-04-21	1	-0/+64
\| * \| \| \| \| \|	Ignore conflicting keep attributes, unless asked not to. Fixes #1733	Claire Wolf	2020-04-20	1	-14/+44
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* \| \| \| \| \|	Merge pull request #1851 from YosysHQ/claire/bitselwrite	Claire Wolf	2020-04-21	17	-15/+1431
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\| * \| \| \| \|	Merge pull request #1975 from dh73/claire/bitselwrite	Eddie Hung	2020-04-20	13	-0/+1224
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\| \| * \| \| \| \|	Remove '-ignore_unknown_cells' option from 'sat'	Eddie Hung	2020-04-20	1	-6/+6
\| \| * \| \| \| \|	Simplify test case script	Eddie Hung	2020-04-20	1	-30/+17
\| \| * \| \| \| \|	Remove ununsed files	Eddie Hung	2020-04-20	5	-83/+0
\| \| * \| \| \| \|	Modifications of tests as per Eddie's request	diego	2020-04-20	15	-78/+1237
\| \| * \| \| \| \|	Wrong fixed value	diego	2020-04-17	1	-1/+1
\| \| * \| \| \| \|	Adding tests for dynamic part select optimisation	diego	2020-04-16	7	-0/+161
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\| * \| \| \| \|	Make mask-and-shift the default for bitselwrite	Claire Wolf	2020-04-16	1	-1/+1
\| * \| \| \| \|	Add LookaheadRewriter for proper bitselwrite support	Claire Wolf	2020-04-16	4	-4/+144
\| * \| \| \| \|	Improved rewrite code for writing to bit slice (disabled for now)	Claire Wolf	2020-04-15	1	-12/+64
* \| \| \| \| \|	Merge pull request #1961 from whitequark/paramod-original-name	whitequark	2020-04-21	3	-11/+7
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\| * \| \| \| \| \|	ast, rpc: record original name of $paramod\* as \hdlname attribute.	whitequark	2020-04-18	3	-11/+7
* \| \| \| \| \| \|	tests: remove write_ilang	Eddie Hung	2020-04-20	2	-3/+0
* \| \| \| \| \| \|	Merge pull request #1972 from YosysHQ/eddie/bug1970	Eddie Hung	2020-04-20	2	-16/+52
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\| * \| \| \| \| \|	abc9: -prep_lut to be more robust	Eddie Hung	2020-04-20	1	-16/+33
\| * \| \| \| \| \|	abc9: add testcase reduced from #1970	Eddie Hung	2020-04-20	1	-0/+19
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* \| \| \| \| \|	Merge pull request #1964 from YosysHQ/claire/sformatf	Claire Wolf	2020-04-20	1	-8/+38
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\| * \| \| \| \|	Extend support for format strings in Verilog front-end	Claire Wolf	2020-04-18	1	-8/+38
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* \| \| \| \|	Merge pull request #1967 from whitequark/cxxrtl-blackbox-attributes	whitequark	2020-04-19	2	-49/+57
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\| * \| \| \|	cxxrtl: provide attributes to black box factories, too.	whitequark	2020-04-19	2	-49/+57
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* \| \| \|	Merge pull request #1963 from whitequark/cxxrtl-blackboxes	whitequark	2020-04-18	2	-198/+637
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\| * \| \| \|	cxxrtl: add templated black box support.	whitequark	2020-04-18	1	-16/+193
\| * \| \| \|	cxxrtl: make eval() and commit() inline in blackboxes.	whitequark	2020-04-18	1	-82/+103
\| * \| \| \|	cxxrtl: add simple black box support.	whitequark	2020-04-18	2	-70/+311
\| * \| \| \|	cxxrtl: use ID::X instead of ID(X). NFC.	whitequark	2020-04-18	1	-107/+107
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* \| \| \|	Merge pull request #1955 from whitequark/cxxrtl-sync_always	whitequark	2020-04-17	1	-3/+13
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\| * \| \| \|	cxxrtl: correctly handle `sync always` rules.	whitequark	2020-04-17	1	-3/+13
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* \| \| \|	Merge pull request #1952 from boqwxp/add_edge_location	whitequark	2020-04-17	1	-0/+3
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\| * \| \|	Set Verilog source location for explicit blocks (`begin` ... `end`).	Alberto Gonzalez	2020-04-17	1	-0/+1
\| * \| \|	Add Verilog source location information to `AST_POSEDGE` and `AST_NEGEDGE` no...	Alberto Gonzalez	2020-04-17	1	-0/+2
* \| \| \|	Merge pull request #1954 from YosysHQ/dave/fix-stdout-conflict	whitequark	2020-04-17	1	-3/+3
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\| * \| \| \|	qbfsat: Fix illegal use of 'stdout' identifier	David Shah	2020-04-17	1	-3/+3
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* \| \| \|	Merge pull request #1951 from whitequark/rtlil-string_attribute	whitequark	2020-04-17	2	-19/+33
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\| * \| \|	rtlil: add AttrObject::has_attribute.	whitequark	2020-04-16	2	-0/+7
\| * \| \|	rtlil: add AttrObject::{get,set}_string_attribute.	whitequark	2020-04-16	2	-19/+26
* \| \| \|	Merge pull request #1898 from boqwxp/locations	whitequark	2020-04-17	1	-0/+3
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\| * \| \| \|	Add location information to `AST_CONSTANT` nodes.	Alberto Gonzalez	2020-04-16	1	-0/+3
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* \| \| \|	Merge pull request #1864 from boqwxp/cleanup_techmap_abc	whitequark	2020-04-17	1	-99/+80
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\| * \| \| \|	Simplify `passes/techmap/abc.cc` and remove superfluous `RTLIL::SigSpec` cons...	Alberto Gonzalez	2020-04-14	1	-132/+49
\| * \| \| \|	Clean up pseudo-private member usage and simplify `passes/techmap/abc.cc`.	Alberto Gonzalez	2020-04-05	1	-99/+163
* \| \| \| \|	Merge pull request #1888 from boqwxp/cleanup_scatter	whitequark	2020-04-17	1	-17/+11
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\| * \| \| \| \|	Replace `std::map` with `dict`.	Alberto Gonzalez	2020-04-16	1	-2/+2
\| * \| \| \| \|	Replace pseudo-private member access to `connections_` in `passes/cmds/scatte...	Alberto Gonzalez	2020-04-16	1	-13/+10
\| * \| \| \| \|	Clean up `passes/cmds/scatter.cc`.	Alberto Gonzalez	2020-04-16	1	-10/+7
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* \| \| \| \|	Merge pull request #1882 from boqwxp/cleanup_rename	whitequark	2020-04-17	1	-119/+103
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\| * \| \| \| \|	Use `dict` instead of `std::map`.	Alberto Gonzalez	2020-04-16	1	-9/+9