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Author
Age
Files
Lines
*
synth: handle bit reduction operators. Fix #2328
Tristan Gingold
2023-01-29
1
-7
/
+14
*
vhdl/trans: support suspend states
Tristan Gingold
2023-01-28
10
-16
/
+56
*
vhdl-sem_decls: do not reassign type declarator on subtype aliases
Tristan Gingold
2023-01-28
1
-13
/
+19
*
synth: improve support of interface type
Tristan Gingold
2023-01-28
2
-30
/
+82
*
elab-vhdl_annotations: remove useless code
Tristan Gingold
2023-01-28
1
-18
/
+0
*
vhdl: minor changes to avoid recomputation
Tristan Gingold
2023-01-28
2
-1
/
+1
*
vhdl-evaluation: factorize code
Tristan Gingold
2023-01-28
1
-108
/
+94
*
synth-vhdl_eval: minor reformatting
Tristan Gingold
2023-01-28
1
-18
/
+18
*
synth: fix incorrect check in array subtype indications
Tristan Gingold
2023-01-28
1
-2
/
+8
*
synth-vhdl_oper: add bit-vect and vect-bit operations.
Tristan Gingold
2023-01-27
1
-12
/
+24
*
elab-memtype: add Read_Ptr, Write_Ptr
Tristan Gingold
2023-01-27
2
-0
/
+22
*
grt-files_operations: use grt.files
Tristan Gingold
2023-01-27
5
-81
/
+18
*
src/grt: extract grt-files_lib from grt-files
Tristan Gingold
2023-01-27
7
-554
/
+672
*
trans: add comments
Tristan Gingold
2023-01-27
1
-1
/
+2
*
ghdlrun: extract trans_foreign
Tristan Gingold
2023-01-27
3
-108
/
+144
*
vhdl-evaluation: abstraction
Tristan Gingold
2023-01-26
1
-18
/
+13
*
vhdl-prints: add Print_String
Tristan Gingold
2023-01-26
4
-40
/
+154
*
vhdl-evaluation: refactoring
Tristan Gingold
2023-01-26
1
-49
/
+22
*
vhdl-sem_decls: allow use on non-elaborated functions in generic types
Tristan Gingold
2023-01-26
1
-3
/
+9
*
mcode: add new functions for JIT
Tristan Gingold
2023-01-26
5
-4
/
+63
*
vhdl-sem_decl: handle subtype of interface type. Fix #2326
Tristan Gingold
2023-01-26
1
-0
/
+1
*
vhdl-sem_names: adjust for for element attribute
Tristan Gingold
2023-01-26
1
-0
/
+1
*
vhdl: improve range checks, fix #2323
Tristan Gingold
2023-01-25
6
-236
/
+473
*
synth: add a check for bounds compatibility
Tristan Gingold
2023-01-25
1
-4
/
+39
*
errorout: add int64 arguments
Tristan Gingold
2023-01-25
2
-1
/
+27
*
ghdldrv: extract trans_link from ghdlrun
Tristan Gingold
2023-01-21
3
-459
/
+499
*
elab-vhdl_debug: add 'info lib' and 'info units'
Tristan Gingold
2023-01-21
1
-0
/
+78
*
elab-vhdl_debug: disp generate block declarations
Tristan Gingold
2023-01-20
1
-2
/
+4
*
elab-vhdl_debug: disp process declarations
Tristan Gingold
2023-01-20
1
-0
/
+10
*
synth: create sub-instace for processes
Tristan Gingold
2023-01-20
5
-6
/
+18
*
elab: Rename Get/Set_Info to Get/Set_Ann
Tristan Gingold
2023-01-20
4
-58
/
+59
*
synth: add partial support of foreign subprograms
Tristan Gingold
2023-01-20
6
-2
/
+363
*
std_names: add more AMS names
Tristan Gingold
2023-01-18
2
-1
/
+40
*
simul: handle PSL endpoints
Tristan Gingold
2023-01-18
4
-10
/
+38
*
simul: fix last_value for post vhdl 87
Tristan Gingold
2023-01-18
2
-103
/
+145
*
synth-vhdl_eval: add an overflow check
Tristan Gingold
2023-01-16
1
-2
/
+6
*
synth: emit an error message on foreign subprogram calls
Tristan Gingold
2023-01-16
1
-0
/
+11
*
ghdlsimul: check foreign subprograms
Tristan Gingold
2023-01-16
1
-3
/
+4
*
vhdl: refactoring - remove trans_be, mainly added to vhdl-back_end
Tristan Gingold
2023-01-16
9
-274
/
+266
*
synth: handle invididual assoc with unbounded formals
Tristan Gingold
2023-01-16
1
-6
/
+130
*
simul: disable --trace-signals
Tristan Gingold
2023-01-15
1
-0
/
+4
*
synth: avoid a crash on instantiation
Tristan Gingold
2023-01-15
1
-4
/
+19
*
vhdl-sem.adb: also check elaboration status within package bodies
Tristan Gingold
2023-01-15
1
-6
/
+19
*
synth: avoid a crash on use before elaboration
Tristan Gingold
2023-01-15
1
-8
/
+16
*
synth: add Debug_Backtrace debug procedure
Tristan Gingold
2023-01-15
2
-0
/
+19
*
vhdl: add a warning to detect use before elaboration
Tristan Gingold
2023-01-15
8
-5
/
+99
*
vhdl: add Get/Set_Elaboration_Flag
Tristan Gingold
2023-01-14
4
-265
/
+326
*
synth: more refactoring
Tristan Gingold
2023-01-14
5
-40
/
+40
*
synth: improve error propagation on slices
Tristan Gingold
2023-01-14
5
-9
/
+31
*
synth-vhdl_stmts: introduce synth_individual_formal
Tristan Gingold
2023-01-14
1
-18
/
+107
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