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* vhdl: handle PSL keywords as vhdl08 reserved words; switch to PSL scanner mode.Tristan Gingold2019-08-142-0/+12
* vhdl: add PSL keywords to vhdl08 reserved words.Tristan Gingold2019-08-1410-242/+257
* synth: also extract edge in PSL expressions.Tristan Gingold2019-08-133-18/+36
* synth: extract edge for PSL clocks.Tristan Gingold2019-08-131-27/+34
* vhdl-nodes_walk: handle iir_kind_psl_default_clock.Tristan Gingold2019-08-131-1/+2
* libghdlsynth: make it almost empty, as libghdl will be used instead.Tristan Gingold2019-08-131-8/+0
* Support for PSL assert and assume in synthesis (#892)Pepijn de Vos2019-08-131-4/+53
* libghdl: also add synthesis part. For #884Tristan Gingold2019-08-136-52/+56
* synth: build_header was replaced by a Makefile target.Tristan Gingold2019-08-131-8/+0
* libghdl: preliminary work to also support synth.Tristan Gingold2019-08-132-4/+9
* vhdl: improve reprint of inertial association.Tristan Gingold2019-08-116-181/+206
* vhdl-sem: fix minor thinko for sem_insert_anonymous_signal.Tristan Gingold2019-08-111-1/+24
* vhdl: avoid crash on incorrect unit name.Tristan Gingold2019-08-102-6/+36
* vhdl: handle subtype indication (with range) in discrete_range.Tristan Gingold2019-08-107-63/+105
* synth: add comments.Tristan Gingold2019-08-091-1/+9
* vhdl: remove unused Get/Set_Choice_Order.Tristan Gingold2019-08-095-304/+247
* synth: fix crash when assignment target is an aggregate.Tristan Gingold2019-08-081-5/+7
* vhdl: remove -Whides warnings for processes without a label.Tristan Gingold2019-08-081-0/+9
* synth: handle 1 bit integer in disp_vhdl, fix range in synth-expr.Tristan Gingold2019-08-082-4/+13
* vhdl: remove severity from cover, report and severity from assume.Tristan Gingold2019-08-0811-142/+160
* vhdl-nodes: gather PSL nodes, regenerate nodes_meta.Tristan Gingold2019-08-072-125/+91
* Add support for PSL assumptions, used in formal verification (#880)Pepijn de Vos2019-08-0730-141/+334
* vhdl: allow discrete subtype indication for discrete_range.Tristan Gingold2019-08-065-45/+53
* vhdl: for time resolution, do not consider unit name from textio body.Tristan Gingold2019-08-062-10/+38
* synth: improve support of vhdl08. Fix #882Tristan Gingold2019-08-052-5/+22
* synth: add asserts in synth-valuesTristan Gingold2019-08-051-0/+5
* synth: handle subtype conversions.Tristan Gingold2019-08-055-73/+154
* synth: handle signed conversions in disp_vhdl.Tristan Gingold2019-08-051-2/+6
* synth: preliminary support of integer literals.Tristan Gingold2019-08-022-18/+67
* synth: add a debug procedure.Tristan Gingold2019-08-022-0/+22
* synth: improve error message for multiple assignments.Tristan Gingold2019-08-021-4/+20
* synth: handle signed integer comparisons (#878)Pepijn de Vos2019-08-013-0/+43
* synth: handle partial assignments in a process (WIP).Tristan Gingold2019-08-011-18/+75
* synth: refactoring in inference/environment.Tristan Gingold2019-08-013-7/+13
* synth: refactor inference, add comment, strengthen check.Tristan Gingold2019-08-014-31/+62
* synth: refactoring in synth-inference.Tristan Gingold2019-07-311-129/+137
* synth: add location on monadic operators.Tristan Gingold2019-07-311-7/+10
* synth: regenerate ghdlsynth_gates.hTristan Gingold2019-07-311-3/+4
* synth: fix a crash in instantiation.Tristan Gingold2019-07-312-8/+9
* synth: slightly improve output for indexes.Tristan Gingold2019-07-301-3/+7
* synth: adjust output for dyn_insert, add dpram2 test.Tristan Gingold2019-07-301-2/+2
* synth: fixes for indexed names.Tristan Gingold2019-07-303-3/+13
* synth: rework indexed names.Tristan Gingold2019-07-304-101/+106
* synth: handle more conversions in disp_vhdlTristan Gingold2019-07-291-1/+44
* synth: add support for memories.Tristan Gingold2019-07-2915-152/+445
* synth: remove extract_bound (trivial).Tristan Gingold2019-07-285-15/+6
* synth: unconstrained arrays.Tristan Gingold2019-07-285-17/+71
* synth: preliminary support of dynamic indexing.Tristan Gingold2019-07-2813-740/+956
* vhdl: linearize analyze and evaluation of concat operators.Tristan Gingold2019-07-265-360/+647
* synth: rework range.Tristan Gingold2019-07-265-48/+52
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