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vhdl
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Author
Age
Files
Lines
*
vhdl-sem_expr: avoid crash if no choices.
Tristan Gingold
2019-06-13
1
-1
/
+3
*
vhdl-parse: improve error message in case of unexpected
Tristan Gingold
2019-06-13
1
-0
/
+12
*
vhdl/simulate: fix regression wrt package instances.
Tristan Gingold
2019-06-12
2
-4
/
+6
*
vhdl-sem_types: set base type of error types.
Tristan Gingold
2019-06-12
1
-0
/
+1
*
vhdl: improve error messages for generate statement.
Tristan Gingold
2019-06-12
3
-3
/
+5
*
simul: refine scalar type annotations.
Tristan Gingold
2019-06-12
2
-17
/
+49
*
vhdl-nodes: add Node_List and Node_Flist aliases.
Tristan Gingold
2019-06-12
1
-0
/
+2
*
synth: handle integer +/- for constants.
Tristan Gingold
2019-06-08
2
-2
/
+4
*
nodes.py: regenerated.
Tristan Gingold
2019-06-07
1
-6
/
+12
*
synth: added support for numeric_std unary negation
Christos Gentsos
2019-06-06
2
-1
/
+29
*
synth: handle numeric_std subtraction (addition was already there)
Christos Gentsos
2019-06-06
2
-0
/
+27
*
vhdl: detect unused signals and variables.
Tristan Gingold
2019-06-05
6
-26
/
+42
*
python: export Enable_Warning.
Tristan Gingold
2019-06-05
2
-0
/
+8
*
vhdl-errors: avoid a crash on error type.
Tristan Gingold
2019-06-05
1
-0
/
+3
*
vhdl-prints: try to print error content.
Tristan Gingold
2019-06-04
1
-0
/
+10
*
vhdl-sem_expr: do not try to report empty error message.
Tristan Gingold
2019-06-04
1
-5
/
+7
*
vhdl: adjust formatters and add python bindings.
Tristan Gingold
2019-06-04
5
-6
/
+30
*
vhdl-sem_specs: avoid a crash on missing entity name.
Tristan Gingold
2019-06-04
1
-0
/
+4
*
files_map-editor: add Fill_Text_Ptr.
Tristan Gingold
2019-06-03
1
-1
/
+1
*
vhdl-scanner: optimization
Tristan Gingold
2019-06-03
1
-6
/
+17
*
vhdl-formatters: remove useless use clause.
Tristan Gingold
2019-06-03
1
-1
/
+0
*
vhdl-formatters: add range for indent.
Tristan Gingold
2019-06-03
2
-13
/
+58
*
vhdl-prints: fix extra 'else' in disp_conditional_waveform.
Tristan Gingold
2019-06-03
1
-2
/
+3
*
vhdl-formatters: Use vstrings to format into a string.
Tristan Gingold
2019-06-03
2
-25
/
+134
*
vhdl-prints: improve indent.
Tristan Gingold
2019-06-02
1
-0
/
+4
*
vhdl-prints: improve output for if/then, architecture.
Tristan Gingold
2019-06-01
1
-0
/
+4
*
grt: extract grt.to_strings from grt.images
Tristan Gingold
2019-06-01
1
-9
/
+10
*
vhdl-formatters: add indent.
Tristan Gingold
2019-06-01
3
-28
/
+224
*
vhdl: add code formatter (WIP)
Tristan Gingold
2019-05-30
2
-0
/
+279
*
vhdl: differenciate block and line comments.
Tristan Gingold
2019-05-30
6
-185
/
+195
*
vhdl-prints: handle PSL, add psl tokens for strong and inclusive variants.
Tristan Gingold
2019-05-30
3
-85
/
+412
*
vhdl: renames disp_vhdl to prints
Tristan Gingold
2019-05-30
11
-83
/
+88
*
vhdl-disp_vhdl: minor improvements on the output.
Tristan Gingold
2019-05-30
2
-68
/
+114
*
vhdl-disp_vhdl: print literals and identifiers from the source.
Tristan Gingold
2019-05-29
10
-586
/
+738
*
trans-chap8: reverse_range returns false for is_for_loop_iterator_stable.
Tristan Gingold
2019-05-28
1
-20
/
+23
*
vhdl: time resolution is fs for auto in vhdl 87
Tristan Gingold
2019-05-28
1
-0
/
+6
*
vhdl-sem_names: check time resoultion for standalone units.
Tristan Gingold
2019-05-28
1
-0
/
+10
*
vhdl: get rid of Get/Set_Physical_Unit.
Tristan Gingold
2019-05-28
10
-471
/
+402
*
vhdl-sem_stmts.adb: minor refactoring.
Tristan Gingold
2019-05-28
1
-1
/
+1
*
vhdl-disp_vhdl: refactoring.
Tristan Gingold
2019-05-25
1
-7
/
+5
*
vhdl: move Current_Text from vhdl-utils to vhdl-parse.
Tristan Gingold
2019-05-25
3
-28
/
+23
*
vhdl-disp_vhdl: minor refactoring.
Tristan Gingold
2019-05-25
1
-8
/
+5
*
vhdl-disp_vhdl: fixes for psl.
Tristan Gingold
2019-05-25
1
-2
/
+2
*
vhdl-disp_vhdl: reworked, use a token based printer.
Tristan Gingold
2019-05-24
2
-1741
/
+2184
*
vhdl: update AMS parsing.
Tristan Gingold
2019-05-24
3
-173
/
+195
*
psl: can keep parenthesis during parse.
Tristan Gingold
2019-05-24
2
-31
/
+105
*
vhdl-parse: Add Has_Is for block_statement.
Tristan Gingold
2019-05-24
3
-1
/
+7
*
vhdl-parse: minor changes for disp_vhdl.
Tristan Gingold
2019-05-24
1
-0
/
+5
*
vhdl/simulate: ignore some constructs for synthesis.
Tristan Gingold
2019-05-23
2
-3
/
+5
*
trans-chap3: improve style.
Tristan Gingold
2019-05-23
1
-3
/
+2
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