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Author
Age
Files
Lines
*
vhdl-sem_expr: avoid crash if no choices.
Tristan Gingold
2019-06-13
1
-1
/
+3
*
vhdl-parse: improve error message in case of unexpected
Tristan Gingold
2019-06-13
1
-0
/
+12
*
synth-expr: use Node instead of Iir (renaming).
Tristan Gingold
2019-06-13
2
-34
/
+34
*
synth-stmts: handle enumeration type in case, renaming.
Tristan Gingold
2019-06-13
2
-64
/
+73
*
vhdl/simulate: fix regression wrt package instances.
Tristan Gingold
2019-06-12
2
-4
/
+6
*
synth-expr: handle choice_by_expression in aggregates.
Tristan Gingold
2019-06-12
1
-3
/
+30
*
vhdl-sem_types: set base type of error types.
Tristan Gingold
2019-06-12
1
-0
/
+1
*
vhdl: improve error messages for generate statement.
Tristan Gingold
2019-06-12
3
-3
/
+5
*
Add mutils.
Tristan Gingold
2019-06-12
2
-0
/
+34
*
synth: handle enumerated types.
Tristan Gingold
2019-06-12
5
-51
/
+97
*
simul: refine scalar type annotations.
Tristan Gingold
2019-06-12
2
-17
/
+49
*
vhdl-nodes: add Node_List and Node_Flist aliases.
Tristan Gingold
2019-06-12
1
-0
/
+2
*
synth-expr: resize for uns-uns operations.
Tristan Gingold
2019-06-12
1
-18
/
+28
*
netlist-disp_vhdl: display parameters, fix output
Tristan Gingold
2019-06-12
1
-11
/
+45
*
synth: handle conditional generate process.
Tristan Gingold
2019-06-11
1
-1
/
+45
*
synth: support conditional signal assignments.
Tristan Gingold
2019-06-08
7
-9
/
+79
*
synth: handle integer +/- for constants.
Tristan Gingold
2019-06-08
4
-23
/
+43
*
synth: WIP for dependencies.
Tristan Gingold
2019-06-07
3
-11
/
+74
*
synth: add comments.
Tristan Gingold
2019-06-07
2
-5
/
+13
*
nodes.py: regenerated.
Tristan Gingold
2019-06-07
1
-6
/
+12
*
synth: add comments and refactoring.
Tristan Gingold
2019-06-07
9
-25
/
+45
*
synth: ignore attribute specifications
Christos Gentsos
2019-06-06
1
-0
/
+2
*
synth: handle numeric_std unsigned - unsigned add and sub
Christos Gentsos
2019-06-06
1
-0
/
+22
*
synth: handle array equality op (just for arrays of identical range)
Christos Gentsos
2019-06-06
1
-0
/
+8
*
synth: enabled vector AND, OR and XOR
Christos Gentsos
2019-06-06
1
-8
/
+14
*
synth: added support for numeric_std unary negation
Christos Gentsos
2019-06-06
4
-1
/
+34
*
synth: handle numeric_std subtraction (addition was already there)
Christos Gentsos
2019-06-06
3
-0
/
+38
*
synth: added support for vector "not" operation
Christos Gentsos
2019-06-06
1
-0
/
+9
*
synth: added support for array-element and element-array concats
Christos Gentsos
2019-06-06
1
-2
/
+27
*
synth-decls: ignore attribute declarations
Christos Gentsos
2019-06-06
1
-0
/
+2
*
Remove unused use clause.
Tristan Gingold
2019-06-06
1
-1
/
+0
*
synth-expr: fix a crash in vectorize_array
Tristan Gingold
2019-06-06
1
-1
/
+4
*
libghdlsynth: fix build failure.
Tristan Gingold
2019-06-06
1
-1
/
+1
*
libghdlsynth: fix startup crash.
Tristan Gingold
2019-06-06
1
-0
/
+2
*
vhdl: detect unused signals and variables.
Tristan Gingold
2019-06-05
6
-26
/
+42
*
python: export Enable_Warning.
Tristan Gingold
2019-06-05
2
-0
/
+8
*
ghdlcomp: really obey to --force-analysis.
Tristan Gingold
2019-06-05
1
-11
/
+6
*
vhdl-errors: avoid a crash on error type.
Tristan Gingold
2019-06-05
1
-0
/
+3
*
ghdldrv: handle --force-analysis for llvm and gcc.
Tristan Gingold
2019-06-05
3
-5
/
+3
*
vhdl-prints: try to print error content.
Tristan Gingold
2019-06-04
1
-0
/
+10
*
vhdl-sem_expr: do not try to report empty error message.
Tristan Gingold
2019-06-04
1
-5
/
+7
*
ghdl import: avoid a crash in case of error.
Tristan Gingold
2019-06-04
1
-20
/
+19
*
errorout: stop after error limit.
Tristan Gingold
2019-06-04
1
-2
/
+2
*
vhdl: adjust formatters and add python bindings.
Tristan Gingold
2019-06-04
5
-6
/
+30
*
vhdl-sem_specs: avoid a crash on missing entity name.
Tristan Gingold
2019-06-04
1
-0
/
+4
*
ghdldrv: reject empty argument. Fix #830
Tristan Gingold
2019-06-04
1
-0
/
+5
*
files_map-editor: fix compilation.
Tristan Gingold
2019-06-03
1
-11
/
+11
*
files_map-editor: add Fill_Text_Ptr.
Tristan Gingold
2019-06-03
3
-5
/
+34
*
files_map: add get_buffer_length
Tristan Gingold
2019-06-03
2
-2
/
+12
*
vhdl-scanner: optimization
Tristan Gingold
2019-06-03
1
-6
/
+17
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