aboutsummaryrefslogtreecommitdiffstats
path: root/src/synth/synth-decls.adb
Commit message (Expand)AuthorAgeFilesLines
* synth: add value_const.Tristan Gingold2019-10-201-1/+3
* synth-decls: ignore use clauses.Tristan Gingold2019-10-101-0/+2
* synth: use synth.source for setting location.Tristan Gingold2019-10-091-0/+1
* synth: handle read-only aliases. Fix #973Tristan Gingold2019-10-081-1/+9
* synth: handle subprograms in package body.Tristan Gingold2019-10-081-0/+5
* synth: handle package bodies.Tristan Gingold2019-10-071-1/+16
* synth: preliminary support for user packages.Tristan Gingold2019-10-071-0/+33
* synth: replace memidx2 by addidx; handle some 2d arrays.Tristan Gingold2019-10-031-1/+4
* synth: improve support of arrays or arrays. Fix #955Tristan Gingold2019-10-011-4/+3
* synth: renaming and minor refactoring.Tristan Gingold2019-09-301-4/+4
* synth-decls: improve handling of subtype aliases forTristan Gingold2019-09-301-26/+42
* synth: convert subtype in alias declaration. Fix #946Tristan Gingold2019-09-301-2/+6
* synth: special handling of 'const' functions.Tristan Gingold2019-09-301-13/+26
* synth: refactoring of alias (allow alias of anything).Tristan Gingold2019-09-301-3/+3
* synth: introduce type_logicTristan Gingold2019-09-291-3/+3
* synth: finalize declarations and free wires.Tristan Gingold2019-09-271-0/+65
* synth: handle range attribute; handle vhdl08 array subtype.Tristan Gingold2019-09-271-19/+25
* synth: do subtype conversion for variable defaultTristan Gingold2019-09-261-0/+2
* synth: fixes after previous patch.Tristan Gingold2019-09-251-4/+6
* synth: rework type for expression.Tristan Gingold2019-09-251-7/+21
* synth: introduce type_unbounded_vector.Tristan Gingold2019-09-221-7/+15
* synth: add Get_Build (WIP).Tristan Gingold2019-09-201-4/+4
* synth: make synth_instance_type private.Tristan Gingold2019-09-191-3/+2
* synth: handle record subtypes.Tristan Gingold2019-09-191-36/+49
* synth: initialize subprogram variables.Tristan Gingold2019-09-131-3/+9
* synth: Add width field in type_type record.Tristan Gingold2019-09-111-5/+10
* synth: handle alias (WIP, read only).Tristan Gingold2019-09-111-2/+17
* synth: elab subprogram interfaces subtypeTristan Gingold2019-08-311-2/+13
* synth: add support for record types.Tristan Gingold2019-08-291-1/+17
* vhdl: handle PSL keywords as vhdl08 reserved words; switch to PSL scanner mode.Tristan Gingold2019-08-141-0/+3
* synth: improve support of vhdl08. Fix #882Tristan Gingold2019-08-051-4/+13
* synth: fixes for indexed names.Tristan Gingold2019-07-301-1/+3
* synth: add support for memories.Tristan Gingold2019-07-291-1/+0
* synth: remove extract_bound (trivial).Tristan Gingold2019-07-281-0/+2
* synth: unconstrained arrays.Tristan Gingold2019-07-281-9/+21
* synth: preliminary support of dynamic indexing.Tristan Gingold2019-07-281-54/+144
* synth: preliminary support of integer subtypes.Tristan Gingold2019-07-261-1/+1
* synth: handle bit.Tristan Gingold2019-07-251-0/+1
* synth: save and display locations for instances.Tristan Gingold2019-07-251-0/+1
* synth: handle record type declarations.Tristan Gingold2019-07-241-1/+11
* synth: make type Wire_Id_Record private.Tristan Gingold2019-07-171-1/+1
* synth: handle anonymous subtypes in array subtypes.Tristan Gingold2019-07-151-4/+10
* synth: do not crash on use of std_logic_1164 2008.Tristan Gingold2019-07-101-2/+6
* vhdl-annotations: partial revert of previous patch forTristan Gingold2019-07-041-1/+2
* synth: handle vhdl2008 std_logic_1164, handle anonymous_signal.Tristan Gingold2019-07-041-5/+6
* synth: ignore non object aliases.Tristan Gingold2019-07-031-0/+2
* synth-decls: handle initial value for variables andTristan Gingold2019-07-021-5/+4
* synth: destroy iterator after for-loop.Tristan Gingold2019-07-011-7/+16
* vhdl: move annotations from simul to vhdl.Tristan Gingold2019-06-291-1/+1
* synth: get rid of execution and elaboration.Tristan Gingold2019-06-191-13/+185