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| author | Tristan Gingold <tgingold@free.fr> | 2019-07-26 04:32:07 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-07-26 04:32:07 +0200 |
| commit | 2075f8cf5995bc83a8edc07456331b5b0f5b6be1 (patch) | |
| tree | 114477245057faf8957c9790b18c61d78f62605e /src/synth/synth-decls.adb | |
| parent | 1aa373bd730caa2a558cc02f3f6a0fb269316a16 (diff) | |
| download | ghdl-2075f8cf5995bc83a8edc07456331b5b0f5b6be1.tar.gz ghdl-2075f8cf5995bc83a8edc07456331b5b0f5b6be1.tar.bz2 ghdl-2075f8cf5995bc83a8edc07456331b5b0f5b6be1.zip | |
synth: preliminary support of integer subtypes.
Diffstat (limited to 'src/synth/synth-decls.adb')
| -rw-r--r-- | src/synth/synth-decls.adb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/synth/synth-decls.adb b/src/synth/synth-decls.adb index d7a0699d9..48952ef5a 100644 --- a/src/synth/synth-decls.adb +++ b/src/synth/synth-decls.adb @@ -46,7 +46,7 @@ package body Synth.Decls is case Val.Kind is when Value_Wire => -- FIXME: get the width directly from the wire ? - W := Get_Width (Syn_Inst, Get_Type (Decl)); + W := Get_Bound_Width (Val.W_Bound); Name := New_Sname (Syn_Inst.Name, Get_Identifier (Decl)); if Init /= null then Ival := Get_Net (Init, Get_Type (Decl)); |